ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

hw/cirrus_vga.c: Replace register_ioport_* 

Replace all register_ioport_*() with the new Memory API.
This permits to use the new Memory stuff like listeners.

Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
[AF: Rebased onto hwaddr]
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Julien Grall 2012-09-19 12:50:06 +01:00 committed by Andreas Färber
parent 42d8a3cf96
commit c75e6d8e35
1 changed files with 28 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

48
hw/cirrus_vga.c
View File

@ -197,6 +197,7 @@ typedef void (*cirrus_fill_t)(struct CirrusVGAState *s,
typedef struct CirrusVGAState { typedef struct CirrusVGAState {
VGACommonState vga; VGACommonState vga;
MemoryRegion cirrus_vga_io;
MemoryRegion cirrus_linear_io; MemoryRegion cirrus_linear_io;
MemoryRegion cirrus_linear_bitblt_io; MemoryRegion cirrus_linear_bitblt_io;
MemoryRegion cirrus_mmio_io; MemoryRegion cirrus_mmio_io;
@ -2432,13 +2433,15 @@ static void cirrus_update_memory_access(CirrusVGAState *s)
/* I/O ports */ /* I/O ports */
static uint32_t cirrus_vga_ioport_read(void *opaque, uint32_t addr) static uint64_t cirrus_vga_ioport_read(void *opaque, hwaddr addr,
unsigned size)
{ {
CirrusVGAState *c = opaque; CirrusVGAState *c = opaque;
VGACommonState *s = &c->vga; VGACommonState *s = &c->vga;
int val, index; int val, index;
qemu_flush_coalesced_mmio_buffer(); qemu_flush_coalesced_mmio_buffer();
addr += 0x3b0;
if (vga_ioport_invalid(s, addr)) { if (vga_ioport_invalid(s, addr)) {
val = 0xff; val = 0xff;
@ -2527,13 +2530,15 @@ static uint32_t cirrus_vga_ioport_read(void *opaque, uint32_t addr)
return val; return val;
} }
static void cirrus_vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) static void cirrus_vga_ioport_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{ {
CirrusVGAState *c = opaque; CirrusVGAState *c = opaque;
VGACommonState *s = &c->vga; VGACommonState *s = &c->vga;
int index; int index;
qemu_flush_coalesced_mmio_buffer(); qemu_flush_coalesced_mmio_buffer();
addr += 0x3b0;
/* check port range access depending on color/monochrome mode */ /* check port range access depending on color/monochrome mode */
if (vga_ioport_invalid(s, addr)) { if (vga_ioport_invalid(s, addr)) {
@ -2646,7 +2651,7 @@ static uint64_t cirrus_mmio_read(void *opaque, hwaddr addr,
if (addr >= 0x100) { if (addr >= 0x100) {
return cirrus_mmio_blt_read(s, addr - 0x100); return cirrus_mmio_blt_read(s, addr - 0x100);
} else { } else {
return cirrus_vga_ioport_read(s, addr + 0x3c0); return cirrus_vga_ioport_read(s, addr + 0x10, size);
} }
} }
@ -2658,7 +2663,7 @@ static void cirrus_mmio_write(void *opaque, hwaddr addr,
if (addr >= 0x100) { if (addr >= 0x100) {
cirrus_mmio_blt_write(s, addr - 0x100, val); cirrus_mmio_blt_write(s, addr - 0x100, val);
} else { } else {
cirrus_vga_ioport_write(s, addr + 0x3c0, val); cirrus_vga_ioport_write(s, addr + 0x10, val, size);
} }
} }
@ -2784,8 +2789,19 @@ static const MemoryRegionOps cirrus_linear_io_ops = {
}, },
}; };
static const MemoryRegionOps cirrus_vga_io_ops = {
.read = cirrus_vga_ioport_read,
.write = cirrus_vga_ioport_write,
.endianness = DEVICE_LITTLE_ENDIAN,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
},
};
static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci, static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
MemoryRegion *system_memory) MemoryRegion *system_memory,
MemoryRegion *system_io)
{ {
int i; int i;
static int inited; static int inited;
@ -2817,19 +2833,10 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
s->bustype = CIRRUS_BUSTYPE_ISA; s->bustype = CIRRUS_BUSTYPE_ISA;
} }
register_ioport_write(0x3c0, 16, 1, cirrus_vga_ioport_write, s); /* Register ioport 0x3b0 - 0x3df */
memory_region_init_io(&s->cirrus_vga_io, &cirrus_vga_io_ops, s,
register_ioport_write(0x3b4, 2, 1, cirrus_vga_ioport_write, s); "cirrus-io", 0x30);
register_ioport_write(0x3d4, 2, 1, cirrus_vga_ioport_write, s); memory_region_add_subregion(system_io, 0x3b0, &s->cirrus_vga_io);
register_ioport_write(0x3ba, 1, 1, cirrus_vga_ioport_write, s);
register_ioport_write(0x3da, 1, 1, cirrus_vga_ioport_write, s);
register_ioport_read(0x3c0, 16, 1, cirrus_vga_ioport_read, s);
register_ioport_read(0x3b4, 2, 1, cirrus_vga_ioport_read, s);
register_ioport_read(0x3d4, 2, 1, cirrus_vga_ioport_read, s);
register_ioport_read(0x3ba, 1, 1, cirrus_vga_ioport_read, s);
register_ioport_read(0x3da, 1, 1, cirrus_vga_ioport_read, s);
memory_region_init(&s->low_mem_container, memory_region_init(&s->low_mem_container,
"cirrus-lowmem-container", "cirrus-lowmem-container",
@ -2900,7 +2907,7 @@ static int vga_initfn(ISADevice *dev)
vga_common_init(s); vga_common_init(s);
cirrus_init_common(&d->cirrus_vga, CIRRUS_ID_CLGD5430, 0, cirrus_init_common(&d->cirrus_vga, CIRRUS_ID_CLGD5430, 0,
isa_address_space(dev)); isa_address_space(dev), isa_address_space_io(dev));
s->ds = graphic_console_init(s->update, s->invalidate, s->ds = graphic_console_init(s->update, s->invalidate,
s->screen_dump, s->text_update, s->screen_dump, s->text_update,
s); s);
@ -2948,7 +2955,8 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
/* setup VGA */ /* setup VGA */
vga_common_init(&s->vga); vga_common_init(&s->vga);
cirrus_init_common(s, device_id, 1, pci_address_space(dev)); cirrus_init_common(s, device_id, 1, pci_address_space(dev),
pci_address_space_io(dev));
s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate, s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
s->vga.screen_dump, s->vga.text_update, s->vga.screen_dump, s->vga.text_update,
&s->vga); &s->vga);