From c6013547560c33068dca3368ca7cd74b13f1a780 Mon Sep 17 00:00:00 2001 From: Frank Chang Date: Tue, 14 Sep 2021 09:37:15 +0800 Subject: [PATCH] target/riscv: Backup/restore mstatus.SD bit when virtual register swapped When virtual registers are swapped, mstatus.SD bit should also be backed up/restored. Otherwise, mstatus.SD bit will be incorrectly kept across the world switches. Signed-off-by: Frank Chang Reviewed-by: Vincent Chen Reviewed-by: Alistair Francis Message-id: 20210914013717.881430-1-frank.chang@sifive.com [ Changes by AF: - Convert variable to a uint64_t to fix clang error ] Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 701858d670..d41d5cd27c 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -106,9 +106,10 @@ bool riscv_cpu_fp_enabled(CPURISCVState *env) void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env) { + uint64_t sd = riscv_cpu_is_32bit(env) ? MSTATUS32_SD : MSTATUS64_SD; uint64_t mstatus_mask = MSTATUS_MXR | MSTATUS_SUM | MSTATUS_FS | MSTATUS_SPP | MSTATUS_SPIE | MSTATUS_SIE | - MSTATUS64_UXL; + MSTATUS64_UXL | sd; bool current_virt = riscv_cpu_virt_enabled(env); g_assert(riscv_has_ext(env, RVH));