From c46562fb2fd41429c7acbf10dedfd5cbe0aa34fa Mon Sep 17 00:00:00 2001
From: Yongbok Kim <yongbok.kim@mips.com>
Date: Thu, 2 Aug 2018 16:16:08 +0200
Subject: [PATCH] target/mips: Add emulation of nanoMIPS 16-bit shift
 instructions

Add emulation of nanoMIPS 16-bit shift instructions.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
---
 target/mips/translate.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index b0bbf4cbbd..e3fac1ab0b 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -16765,6 +16765,21 @@ static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx)
     case NM_P16_MV:
         break;
     case NM_P16_SHIFT:
+        {
+            int shift = extract32(ctx->opcode, 0, 3);
+            uint32_t opc = 0;
+            shift = (shift == 0) ? 8 : shift;
+
+            switch (extract32(ctx->opcode, 3, 1)) {
+            case NM_SLL16:
+                opc = OPC_SLL;
+                break;
+            case NM_SRL16:
+                opc = OPC_SRL;
+                break;
+            }
+            gen_shift_imm(ctx, opc, rt, rs, shift);
+        }
         break;
     case NM_P16C:
         break;