From c291635867a03c9217bd9610fe2a16d997932ec0 Mon Sep 17 00:00:00 2001 From: Bernhard Beschow Date: Thu, 17 Feb 2022 11:19:18 +0100 Subject: [PATCH] hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Based on commit e735b55a8c11dd455e31ccd4420e6c9485191d0c: piix_pci: eliminate PIIX3State::pci_irq_levels PIIX3State::pci_irq_levels are redundant which is already tracked by PCIBus layer. So eliminate them. The IRQ levels in the PCIBus layer are already preserved during migration. By reusing them and rather than having a redundant implementation the bug is avoided in the first place. Suggested-by: Peter Maydell Signed-off-by: Bernhard Beschow Reviewed-by: Peter Maydell Message-Id: <20220217101924.15347-2-shentey@gmail.com> Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/gt64xxx_pci.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index c7480bd019..4cbd0911f5 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1006,14 +1006,11 @@ static int gt64120_pci_map_irq(PCIDevice *pci_dev, int irq_num) } } -static int pci_irq_levels[4]; - static void gt64120_pci_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; qemu_irq *pic = opaque; - - pci_irq_levels[irq_num] = level; + PCIBus *bus = pci_get_bus(piix4_dev); /* now we change the pic irq level according to the piix irq mappings */ /* XXX: optimize */ @@ -1023,7 +1020,7 @@ static void gt64120_pci_set_irq(void *opaque, int irq_num, int level) pic_level = 0; for (i = 0; i < 4; i++) { if (pic_irq == piix4_dev->config[PIIX_PIRQCA + i]) { - pic_level |= pci_irq_levels[i]; + pic_level |= pci_bus_get_irq_level(bus, i); } } qemu_set_irq(pic[pic_irq], pic_level);