mirror of https://github.com/xemu-project/xemu.git
hw/omap : make local function static and remove declaration from header
Signed-off-by: cmchao <cmchao@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
parent
02d7434111
commit
c1ff227b91
36
hw/omap.h
36
hw/omap.h
|
@ -108,15 +108,6 @@ struct omap_intr_handler_s *omap2_inth_init(target_phys_addr_t base,
|
||||||
void omap_inth_reset(struct omap_intr_handler_s *s);
|
void omap_inth_reset(struct omap_intr_handler_s *s);
|
||||||
qemu_irq omap_inth_get_pin(struct omap_intr_handler_s *s, int n);
|
qemu_irq omap_inth_get_pin(struct omap_intr_handler_s *s, int n);
|
||||||
|
|
||||||
struct omap_prcm_s;
|
|
||||||
struct omap_prcm_s *omap_prcm_init(struct omap_target_agent_s *ta,
|
|
||||||
qemu_irq mpu_int, qemu_irq dsp_int, qemu_irq iva_int,
|
|
||||||
struct omap_mpu_state_s *mpu);
|
|
||||||
|
|
||||||
struct omap_sysctl_s;
|
|
||||||
struct omap_sysctl_s *omap_sysctl_init(struct omap_target_agent_s *ta,
|
|
||||||
omap_clk iclk, struct omap_mpu_state_s *mpu);
|
|
||||||
|
|
||||||
/* OMAP2 SDRAM controller */
|
/* OMAP2 SDRAM controller */
|
||||||
struct omap_sdrc_s;
|
struct omap_sdrc_s;
|
||||||
struct omap_sdrc_s *omap_sdrc_init(target_phys_addr_t base);
|
struct omap_sdrc_s *omap_sdrc_init(target_phys_addr_t base);
|
||||||
|
@ -658,34 +649,18 @@ struct omap_dma_lcd_channel_s {
|
||||||
# define OMAP24XX_DMA_EXT_DMAREQ5 64
|
# define OMAP24XX_DMA_EXT_DMAREQ5 64
|
||||||
|
|
||||||
/* omap[123].c */
|
/* omap[123].c */
|
||||||
struct omap_mpu_timer_s;
|
|
||||||
struct omap_mpu_timer_s *omap_mpu_timer_init(target_phys_addr_t base,
|
|
||||||
qemu_irq irq, omap_clk clk);
|
|
||||||
|
|
||||||
/* OMAP2 gp timer */
|
/* OMAP2 gp timer */
|
||||||
struct omap_gp_timer_s;
|
struct omap_gp_timer_s;
|
||||||
struct omap_gp_timer_s *omap_gp_timer_init(struct omap_target_agent_s *ta,
|
struct omap_gp_timer_s *omap_gp_timer_init(struct omap_target_agent_s *ta,
|
||||||
qemu_irq irq, omap_clk fclk, omap_clk iclk);
|
qemu_irq irq, omap_clk fclk, omap_clk iclk);
|
||||||
void omap_gp_timer_reset(struct omap_gp_timer_s *s);
|
void omap_gp_timer_reset(struct omap_gp_timer_s *s);
|
||||||
|
|
||||||
struct omap_watchdog_timer_s;
|
|
||||||
struct omap_watchdog_timer_s *omap_wd_timer_init(target_phys_addr_t base,
|
|
||||||
qemu_irq irq, omap_clk clk);
|
|
||||||
|
|
||||||
struct omap_32khz_timer_s;
|
|
||||||
struct omap_32khz_timer_s *omap_os_timer_init(target_phys_addr_t base,
|
|
||||||
qemu_irq irq, omap_clk clk);
|
|
||||||
|
|
||||||
/* OMAP2 sysctimer */
|
/* OMAP2 sysctimer */
|
||||||
struct omap_synctimer_s;
|
struct omap_synctimer_s;
|
||||||
struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
|
struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
|
||||||
struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk);
|
struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk);
|
||||||
void omap_synctimer_reset(struct omap_synctimer_s *s);
|
void omap_synctimer_reset(struct omap_synctimer_s *s);
|
||||||
|
|
||||||
struct omap_tipb_bridge_s;
|
|
||||||
struct omap_tipb_bridge_s *omap_tipb_bridge_init(target_phys_addr_t base,
|
|
||||||
qemu_irq abort_irq, omap_clk clk);
|
|
||||||
|
|
||||||
struct omap_uart_s;
|
struct omap_uart_s;
|
||||||
struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
|
struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
|
||||||
qemu_irq irq, omap_clk fclk, omap_clk iclk,
|
qemu_irq irq, omap_clk fclk, omap_clk iclk,
|
||||||
|
@ -740,10 +715,6 @@ void omap_mcspi_attach(struct omap_mcspi_s *s,
|
||||||
int chipselect);
|
int chipselect);
|
||||||
void omap_mcspi_reset(struct omap_mcspi_s *s);
|
void omap_mcspi_reset(struct omap_mcspi_s *s);
|
||||||
|
|
||||||
struct omap_rtc_s;
|
|
||||||
struct omap_rtc_s *omap_rtc_init(target_phys_addr_t base,
|
|
||||||
qemu_irq *irq, omap_clk clk);
|
|
||||||
|
|
||||||
struct I2SCodec {
|
struct I2SCodec {
|
||||||
void *opaque;
|
void *opaque;
|
||||||
|
|
||||||
|
@ -773,16 +744,9 @@ struct omap_mcbsp_s *omap_mcbsp_init(target_phys_addr_t base,
|
||||||
qemu_irq *irq, qemu_irq *dma, omap_clk clk);
|
qemu_irq *irq, qemu_irq *dma, omap_clk clk);
|
||||||
void omap_mcbsp_i2s_attach(struct omap_mcbsp_s *s, I2SCodec *slave);
|
void omap_mcbsp_i2s_attach(struct omap_mcbsp_s *s, I2SCodec *slave);
|
||||||
|
|
||||||
struct omap_lpg_s;
|
|
||||||
struct omap_lpg_s *omap_lpg_init(target_phys_addr_t base, omap_clk clk);
|
|
||||||
|
|
||||||
void omap_tap_init(struct omap_target_agent_s *ta,
|
void omap_tap_init(struct omap_target_agent_s *ta,
|
||||||
struct omap_mpu_state_s *mpu);
|
struct omap_mpu_state_s *mpu);
|
||||||
|
|
||||||
struct omap_eac_s;
|
|
||||||
struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta,
|
|
||||||
qemu_irq irq, qemu_irq *drq, omap_clk fclk, omap_clk iclk);
|
|
||||||
|
|
||||||
/* omap_lcdc.c */
|
/* omap_lcdc.c */
|
||||||
struct omap_lcd_panel_s;
|
struct omap_lcd_panel_s;
|
||||||
void omap_lcdc_reset(struct omap_lcd_panel_s *s);
|
void omap_lcdc_reset(struct omap_lcd_panel_s *s);
|
||||||
|
|
12
hw/omap1.c
12
hw/omap1.c
|
@ -247,7 +247,7 @@ static void omap_mpu_timer_reset(struct omap_mpu_timer_s *s)
|
||||||
s->it_ena = 1;
|
s->it_ena = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
struct omap_mpu_timer_s *omap_mpu_timer_init(target_phys_addr_t base,
|
static struct omap_mpu_timer_s *omap_mpu_timer_init(target_phys_addr_t base,
|
||||||
qemu_irq irq, omap_clk clk)
|
qemu_irq irq, omap_clk clk)
|
||||||
{
|
{
|
||||||
int iomemtype;
|
int iomemtype;
|
||||||
|
@ -371,7 +371,7 @@ static void omap_wd_timer_reset(struct omap_watchdog_timer_s *s)
|
||||||
omap_timer_update(&s->timer);
|
omap_timer_update(&s->timer);
|
||||||
}
|
}
|
||||||
|
|
||||||
struct omap_watchdog_timer_s *omap_wd_timer_init(target_phys_addr_t base,
|
static struct omap_watchdog_timer_s *omap_wd_timer_init(target_phys_addr_t base,
|
||||||
qemu_irq irq, omap_clk clk)
|
qemu_irq irq, omap_clk clk)
|
||||||
{
|
{
|
||||||
int iomemtype;
|
int iomemtype;
|
||||||
|
@ -473,7 +473,7 @@ static void omap_os_timer_reset(struct omap_32khz_timer_s *s)
|
||||||
s->timer.ar = 1;
|
s->timer.ar = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
struct omap_32khz_timer_s *omap_os_timer_init(target_phys_addr_t base,
|
static struct omap_32khz_timer_s *omap_os_timer_init(target_phys_addr_t base,
|
||||||
qemu_irq irq, omap_clk clk)
|
qemu_irq irq, omap_clk clk)
|
||||||
{
|
{
|
||||||
int iomemtype;
|
int iomemtype;
|
||||||
|
@ -1180,7 +1180,7 @@ static void omap_tipb_bridge_reset(struct omap_tipb_bridge_s *s)
|
||||||
s->enh_control = 0x000f;
|
s->enh_control = 0x000f;
|
||||||
}
|
}
|
||||||
|
|
||||||
struct omap_tipb_bridge_s *omap_tipb_bridge_init(target_phys_addr_t base,
|
static struct omap_tipb_bridge_s *omap_tipb_bridge_init(target_phys_addr_t base,
|
||||||
qemu_irq abort_irq, omap_clk clk)
|
qemu_irq abort_irq, omap_clk clk)
|
||||||
{
|
{
|
||||||
int iomemtype;
|
int iomemtype;
|
||||||
|
@ -2809,7 +2809,7 @@ static void omap_rtc_reset(struct omap_rtc_s *s)
|
||||||
omap_rtc_tick(s);
|
omap_rtc_tick(s);
|
||||||
}
|
}
|
||||||
|
|
||||||
struct omap_rtc_s *omap_rtc_init(target_phys_addr_t base,
|
static struct omap_rtc_s *omap_rtc_init(target_phys_addr_t base,
|
||||||
qemu_irq *irq, omap_clk clk)
|
qemu_irq *irq, omap_clk clk)
|
||||||
{
|
{
|
||||||
int iomemtype;
|
int iomemtype;
|
||||||
|
@ -3506,7 +3506,7 @@ static void omap_lpg_clk_update(void *opaque, int line, int on)
|
||||||
omap_lpg_update(s);
|
omap_lpg_update(s);
|
||||||
}
|
}
|
||||||
|
|
||||||
struct omap_lpg_s *omap_lpg_init(target_phys_addr_t base, omap_clk clk)
|
static struct omap_lpg_s *omap_lpg_init(target_phys_addr_t base, omap_clk clk)
|
||||||
{
|
{
|
||||||
int iomemtype;
|
int iomemtype;
|
||||||
struct omap_lpg_s *s = (struct omap_lpg_s *)
|
struct omap_lpg_s *s = (struct omap_lpg_s *)
|
||||||
|
|
|
@ -585,7 +585,7 @@ static CPUWriteMemoryFunc * const omap_eac_writefn[] = {
|
||||||
omap_badwidth_write16,
|
omap_badwidth_write16,
|
||||||
};
|
};
|
||||||
|
|
||||||
struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta,
|
static struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta,
|
||||||
qemu_irq irq, qemu_irq *drq, omap_clk fclk, omap_clk iclk)
|
qemu_irq irq, qemu_irq *drq, omap_clk fclk, omap_clk iclk)
|
||||||
{
|
{
|
||||||
int iomemtype;
|
int iomemtype;
|
||||||
|
@ -1783,7 +1783,7 @@ static void omap_prcm_coldreset(struct omap_prcm_s *s)
|
||||||
omap_prcm_reset(s);
|
omap_prcm_reset(s);
|
||||||
}
|
}
|
||||||
|
|
||||||
struct omap_prcm_s *omap_prcm_init(struct omap_target_agent_s *ta,
|
static struct omap_prcm_s *omap_prcm_init(struct omap_target_agent_s *ta,
|
||||||
qemu_irq mpu_int, qemu_irq dsp_int, qemu_irq iva_int,
|
qemu_irq mpu_int, qemu_irq dsp_int, qemu_irq iva_int,
|
||||||
struct omap_mpu_state_s *mpu)
|
struct omap_mpu_state_s *mpu)
|
||||||
{
|
{
|
||||||
|
@ -2157,7 +2157,7 @@ static void omap_sysctl_reset(struct omap_sysctl_s *s)
|
||||||
s->padconf[0x44] = 0x00000800;
|
s->padconf[0x44] = 0x00000800;
|
||||||
}
|
}
|
||||||
|
|
||||||
struct omap_sysctl_s *omap_sysctl_init(struct omap_target_agent_s *ta,
|
static struct omap_sysctl_s *omap_sysctl_init(struct omap_target_agent_s *ta,
|
||||||
omap_clk iclk, struct omap_mpu_state_s *mpu)
|
omap_clk iclk, struct omap_mpu_state_s *mpu)
|
||||||
{
|
{
|
||||||
int iomemtype;
|
int iomemtype;
|
||||||
|
|
Loading…
Reference in New Issue