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Misc patches queue 

- user emulation: Preserve environment variable order
 - macos/darwin/hvf: Fix build warnings, slighly optimize DCache flush
 - target/i386: Minor cleanups, rename  template headers with '.inc' suffix
 - target/hppa: Avoid building int_helper.o on user emulation
 - hw: Add 'name' property to pca954x, export ISAParallelState, silent warnings
 - hw/vfio: Trace number of bitmap dirty pages
 - exec/memory: Introduce RAM_NAMED_FILE to distinct block without named backing store
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Merge tag 'misc-20230613' of https://github.com/philmd/qemu into staging

Misc patches queue

- user emulation: Preserve environment variable order
- macos/darwin/hvf: Fix build warnings, slighly optimize DCache flush
- target/i386: Minor cleanups, rename  template headers with '.inc' suffix
- target/hppa: Avoid building int_helper.o on user emulation
- hw: Add 'name' property to pca954x, export ISAParallelState, silent warnings
- hw/vfio: Trace number of bitmap dirty pages
- exec/memory: Introduce RAM_NAMED_FILE to distinct block without named backing store

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# gpg: Signature made Tue 13 Jun 2023 11:29:13 AM CEST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]

* tag 'misc-20230613' of https://github.com/philmd/qemu:
  exec/memory: Introduce RAM_NAMED_FILE flag
  hw/vfio: Add number of dirty pages to vfio_get_dirty_bitmap tracepoint
  exec/ram_addr: Return number of dirty pages in cpu_physical_memory_set_dirty_lebitmap()
  hw/char/parallel-isa: Export struct ISAParallelState
  hw/char/parallel: Export struct ParallelState
  hw/scsi/megasas: Silent GCC duplicated-cond warning
  hw/ide/ahci: Remove stray backslash
  hw/i2c: Enable an id for the pca954x devices
  target/i386: Rename helper template headers as '.h.inc'
  target/i386/helper: Shuffle do_cpu_init()
  target/i386/helper: Remove do_cpu_sipi() stub for user-mode emulation
  target/hppa/meson: Only build int_helper.o with system emulation
  accel/hvf: Report HV_DENIED error
  util/cacheflush: Avoid possible redundant dcache flush on Darwin
  util/cacheflush: Use declarations from <OSCacheControl.h> on Darwin
  cocoa: Fix warnings about invalid prototype declarations
  linux-user, bsd-user: Preserve incoming order of environment variables in the target

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-06-14 05:27:55 +02:00
parent fdd0df5340 b0182e537e
commit be5e8563f7
37 changed files with 186 additions and 91 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
MAINTAINERS
View File

@ -1740,7 +1740,7 @@ F: hw/rtc/mc146818rtc*
F: hw/watchdog/wdt_ib700.c
F: hw/watchdog/wdt_i6300esb.c
F: include/hw/display/vga.h
F: include/hw/char/parallel.h
F: include/hw/char/parallel*.h
F: include/hw/dma/i8257.h
F: include/hw/i2c/pm_smbus.h
F: include/hw/input/i8042.h

6
accel/hvf/hvf-all.c
View File

@ -38,6 +38,12 @@ void assert_hvf_ok(hv_return_t ret)
case HV_UNSUPPORTED:
error_report("Error: HV_UNSUPPORTED");
break;
#if defined(MAC_OS_VERSION_11_0) && \
MAC_OS_X_VERSION_MIN_REQUIRED >= MAC_OS_VERSION_11_0
case HV_DENIED:
error_report("Error: HV_DENIED");
break;
#endif
default:
error_report("Unknown Error");
}

1
backends/hostmem-file.c
View File

@ -57,6 +57,7 @@ file_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
ram_flags = backend->share ? RAM_SHARED : 0;
ram_flags |= backend->reserve ? 0 : RAM_NORESERVE;
ram_flags |= fb->is_pmem ? RAM_PMEM : 0;
ram_flags |= RAM_NAMED_FILE;
memory_region_init_ram_from_file(&backend->mr, OBJECT(backend), name,
backend->size, fb->align, ram_flags,
fb->mem_path, fb->offset, fb->readonly,

10
bsd-user/main.c
View File

@ -295,8 +295,16 @@ int main(int argc, char **argv)
envlist = envlist_create();
/* add current environment into the list */
/*
* add current environment into the list
* envlist_setenv adds to the front of the list; to preserve environ
* order add from back to front
*/
for (wrk = environ; *wrk != NULL; wrk++) {
continue;
}
while (wrk != environ) {
wrk--;
(void) envlist_setenv(envlist, *wrk);
}

1
hw/char/parallel-isa.c
View File

@ -13,6 +13,7 @@
#include "sysemu/sysemu.h"
#include "hw/isa/isa.h"
#include "hw/qdev-properties.h"
#include "hw/char/parallel-isa.h"
#include "hw/char/parallel.h"
#include "qapi/error.h"

32
hw/char/parallel.c
View File

@ -27,13 +27,11 @@
#include "qapi/error.h"
#include "qemu/module.h"
#include "chardev/char-parallel.h"
#include "chardev/char-fe.h"
#include "hw/acpi/acpi_aml_interface.h"
#include "hw/irq.h"
#include "hw/isa/isa.h"
#include "hw/qdev-properties.h"
#include "hw/qdev-properties-system.h"
#include "migration/vmstate.h"
#include "hw/char/parallel-isa.h"
#include "hw/char/parallel.h"
#include "sysemu/reset.h"
#include "sysemu/sysemu.h"
@ -76,34 +74,6 @@
#define PARA_CTR_SIGNAL (PARA_CTR_SELECT|PARA_CTR_INIT|PARA_CTR_AUTOLF|PARA_CTR_STROBE)
typedef struct ParallelState {
MemoryRegion iomem;
uint8_t dataw;
uint8_t datar;
uint8_t status;
uint8_t control;
qemu_irq irq;
int irq_pending;
CharBackend chr;
int hw_driver;
int epp_timeout;
uint32_t last_read_offset; /* For debugging */
/* Memory-mapped interface */
int it_shift;
PortioList portio_list;
} ParallelState;
OBJECT_DECLARE_SIMPLE_TYPE(ISAParallelState, ISA_PARALLEL)
struct ISAParallelState {
ISADevice parent_obj;
uint32_t index;
uint32_t iobase;
uint32_t isairq;
ParallelState state;
};
static void parallel_update_irq(ParallelState *s)
{
if (s->irq_pending)

22
hw/i2c/i2c_mux_pca954x.c
View File

@ -20,6 +20,7 @@
#include "hw/i2c/i2c_mux_pca954x.h"
#include "hw/i2c/smbus_slave.h"
#include "hw/qdev-core.h"
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
#include "qemu/log.h"
#include "qemu/module.h"
@ -43,6 +44,8 @@ typedef struct Pca954xState {
bool enabled[PCA9548_CHANNEL_COUNT];
I2CBus *bus[PCA9548_CHANNEL_COUNT];
char *name;
} Pca954xState;
/*
@ -181,6 +184,17 @@ static void pca9548_class_init(ObjectClass *klass, void *data)
s->nchans = PCA9548_CHANNEL_COUNT;
}
static void pca954x_realize(DeviceState *dev, Error **errp)
{
Pca954xState *s = PCA954X(dev);
DeviceState *d = DEVICE(s);
if (s->name) {
d->id = g_strdup(s->name);
} else {
d->id = g_strdup_printf("pca954x[%x]", s->parent.i2c.address);
}
}
static void pca954x_init(Object *obj)
{
Pca954xState *s = PCA954X(obj);
@ -197,6 +211,11 @@ static void pca954x_init(Object *obj)
}
}
static Property pca954x_props[] = {
DEFINE_PROP_STRING("name", Pca954xState, name),
DEFINE_PROP_END_OF_LIST()
};
static void pca954x_class_init(ObjectClass *klass, void *data)
{
I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
@ -209,9 +228,12 @@ static void pca954x_class_init(ObjectClass *klass, void *data)
rc->phases.enter = pca954x_enter_reset;
dc->desc = "Pca954x i2c-mux";
dc->realize = pca954x_realize;
k->write_data = pca954x_write_data;
k->receive_byte = pca954x_read_byte;
device_class_set_props(dc, pca954x_props);
}
static const TypeInfo pca954x_info[] = {

2
hw/i386/pc_piix.c
View File

@ -26,7 +26,7 @@
#include CONFIG_DEVICES
#include "qemu/units.h"
#include "hw/char/parallel.h"
#include "hw/char/parallel-isa.h"
#include "hw/dma/i8257.h"
#include "hw/loader.h"
#include "hw/i386/x86.h"

2
hw/i386/pc_q35.c
View File

@ -30,7 +30,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "hw/char/parallel.h"
#include "hw/char/parallel-isa.h"
#include "hw/loader.h"
#include "hw/i2c/smbus_eeprom.h"
#include "hw/rtc/mc146818rtc.h"

2
hw/ide/ahci.c
View File

@ -690,7 +690,7 @@ static void ahci_reset_port(AHCIState *s, int port)
s->dev[port].port_state = STATE_RUN;
if (ide_state->drive_kind == IDE_CD) {
ahci_set_signature(d, SATA_SIGNATURE_CDROM);\
ahci_set_signature(d, SATA_SIGNATURE_CDROM);
ide_state->status = SEEK_STAT | WRERR_STAT | READY_STAT;
} else {
ahci_set_signature(d, SATA_SIGNATURE_DISK);

1
hw/isa/isa-superio.c
View File

@ -21,6 +21,7 @@
#include "hw/isa/superio.h"
#include "hw/qdev-properties.h"
#include "hw/input/i8042.h"
#include "hw/char/parallel-isa.h"
#include "hw/char/serial.h"
#include "trace.h"

16
hw/scsi/megasas.c
View File

@ -42,6 +42,7 @@
#define MEGASAS_MAX_FRAMES 2048 /* Firmware limit at 65535 */
#define MEGASAS_DEFAULT_FRAMES 1000 /* Windows requires this */
#define MEGASAS_GEN2_DEFAULT_FRAMES 1008 /* Windows requires this */
#define MEGASAS_MIN_SGE 64
#define MEGASAS_MAX_SGE 128 /* Firmware limit */
#define MEGASAS_DEFAULT_SGE 80
#define MEGASAS_MAX_SECTORS 0xFFFF /* No real limit */
@ -2356,6 +2357,7 @@ static void megasas_scsi_realize(PCIDevice *dev, Error **errp)
MegasasState *s = MEGASAS(dev);
MegasasBaseClass *b = MEGASAS_GET_CLASS(s);
uint8_t *pci_conf;
uint32_t sge;
int i, bar_type;
Error *err = NULL;
int ret;
@ -2424,13 +2426,15 @@ static void megasas_scsi_realize(PCIDevice *dev, Error **errp)
if (!s->hba_serial) {
s->hba_serial = g_strdup(MEGASAS_HBA_SERIAL);
}
if (s->fw_sge >= MEGASAS_MAX_SGE - MFI_PASS_FRAME_SIZE) {
s->fw_sge = MEGASAS_MAX_SGE - MFI_PASS_FRAME_SIZE;
} else if (s->fw_sge >= 128 - MFI_PASS_FRAME_SIZE) {
s->fw_sge = 128 - MFI_PASS_FRAME_SIZE;
} else {
s->fw_sge = 64 - MFI_PASS_FRAME_SIZE;
sge = s->fw_sge + MFI_PASS_FRAME_SIZE;
if (sge < MEGASAS_MIN_SGE) {
sge = MEGASAS_MIN_SGE;
} else if (sge >= MEGASAS_MAX_SGE) {
sge = MEGASAS_MAX_SGE;
}
s->fw_sge = sge - MFI_PASS_FRAME_SIZE;
if (s->fw_cmds > MEGASAS_MAX_FRAMES) {
s->fw_cmds = MEGASAS_MAX_FRAMES;
}

2
hw/sparc64/sun4u.c
View File

@ -35,7 +35,7 @@
#include "hw/qdev-properties.h"
#include "hw/pci-host/sabre.h"
#include "hw/char/serial.h"
#include "hw/char/parallel.h"
#include "hw/char/parallel-isa.h"
#include "hw/rtc/m48t59.h"
#include "migration/vmstate.h"
#include "hw/input/i8042.h"

7
hw/vfio/common.c
View File

@ -1747,6 +1747,7 @@ static int vfio_get_dirty_bitmap(VFIOContainer *container, uint64_t iova,
{
bool all_device_dirty_tracking =
vfio_devices_all_device_dirty_tracking(container);
uint64_t dirty_pages;
VFIOBitmap vbmap;
int ret;
@ -1772,11 +1773,11 @@ static int vfio_get_dirty_bitmap(VFIOContainer *container, uint64_t iova,
goto out;
}
cpu_physical_memory_set_dirty_lebitmap(vbmap.bitmap, ram_addr,
vbmap.pages);
dirty_pages = cpu_physical_memory_set_dirty_lebitmap(vbmap.bitmap, ram_addr,
vbmap.pages);
trace_vfio_get_dirty_bitmap(container->fd, iova, size, vbmap.size,
ram_addr);
ram_addr, dirty_pages);
out:
g_free(vbmap.bitmap);

2
hw/vfio/trace-events
View File

@ -120,7 +120,7 @@ vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) "Devic
vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sparse entry %d [0x%lx - 0x%lx]"
vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) "%s index %d, %08x/%08x"
vfio_dma_unmap_overflow_workaround(void) ""
vfio_get_dirty_bitmap(int fd, uint64_t iova, uint64_t size, uint64_t bitmap_size, uint64_t start) "container fd=%d, iova=0x%"PRIx64" size= 0x%"PRIx64" bitmap_size=0x%"PRIx64" start=0x%"PRIx64
vfio_get_dirty_bitmap(int fd, uint64_t iova, uint64_t size, uint64_t bitmap_size, uint64_t start, uint64_t dirty_pages) "container fd=%d, iova=0x%"PRIx64" size= 0x%"PRIx64" bitmap_size=0x%"PRIx64" start=0x%"PRIx64" dirty_pages=%"PRIu64
vfio_iommu_map_dirty_notify(uint64_t iova_start, uint64_t iova_end) "iommu dirty @ 0x%"PRIx64" - 0x%"PRIx64
# platform.c

1
include/exec/cpu-common.h
View File

@ -93,6 +93,7 @@ void qemu_ram_set_uf_zeroable(RAMBlock *rb);
bool qemu_ram_is_migratable(RAMBlock *rb);
void qemu_ram_set_migratable(RAMBlock *rb);
void qemu_ram_unset_migratable(RAMBlock *rb);
bool qemu_ram_is_named_file(RAMBlock *rb);
int qemu_ram_get_fd(RAMBlock *rb);
size_t qemu_ram_pagesize(RAMBlock *block);

3
include/exec/memory.h
View File

@ -232,6 +232,9 @@ typedef struct IOMMUTLBEvent {
/* RAM that isn't accessible through normal means. */
#define RAM_PROTECTED (1 << 8)
/* RAM is an mmap-ed named file */
#define RAM_NAMED_FILE (1 << 9)
static inline void iommu_notifier_init(IOMMUNotifier *n, IOMMUNotify fn,
IOMMUNotifierFlag flags,
hwaddr start, hwaddr end,

28
include/exec/ram_addr.h
View File

@ -334,14 +334,23 @@ static inline void cpu_physical_memory_set_dirty_range(ram_addr_t start,
}
#if !defined(_WIN32)
static inline void cpu_physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
ram_addr_t start,
ram_addr_t pages)
/*
* Contrary to cpu_physical_memory_sync_dirty_bitmap() this function returns
* the number of dirty pages in @bitmap passed as argument. On the other hand,
* cpu_physical_memory_sync_dirty_bitmap() returns newly dirtied pages that
* weren't set in the global migration bitmap.
*/
static inline
uint64_t cpu_physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
ram_addr_t start,
ram_addr_t pages)
{
unsigned long i, j;
unsigned long page_number, c;
unsigned long page_number, c, nbits;
hwaddr addr;
ram_addr_t ram_addr;
uint64_t num_dirty = 0;
unsigned long len = (pages + HOST_LONG_BITS - 1) / HOST_LONG_BITS;
unsigned long hpratio = qemu_real_host_page_size() / TARGET_PAGE_SIZE;
unsigned long page = BIT_WORD(start >> TARGET_PAGE_BITS);
@ -369,6 +378,7 @@ static inline void cpu_physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
if (bitmap[k]) {
unsigned long temp = leul_to_cpu(bitmap[k]);
nbits = ctpopl(temp);
qatomic_or(&blocks[DIRTY_MEMORY_VGA][idx][offset], temp);
if (global_dirty_tracking) {
@ -377,10 +387,12 @@ static inline void cpu_physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
temp);
if (unlikely(
global_dirty_tracking & GLOBAL_DIRTY_DIRTY_RATE)) {
total_dirty_pages += ctpopl(temp);
total_dirty_pages += nbits;
}
}
num_dirty += nbits;
if (tcg_enabled()) {
qatomic_or(&blocks[DIRTY_MEMORY_CODE][idx][offset],
temp);
@ -409,9 +421,11 @@ static inline void cpu_physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
for (i = 0; i < len; i++) {
if (bitmap[i] != 0) {
c = leul_to_cpu(bitmap[i]);
nbits = ctpopl(c);
if (unlikely(global_dirty_tracking & GLOBAL_DIRTY_DIRTY_RATE)) {
total_dirty_pages += ctpopl(c);
total_dirty_pages += nbits;
}
num_dirty += nbits;
do {
j = ctzl(c);
c &= ~(1ul << j);
@ -424,6 +438,8 @@ static inline void cpu_physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
}
}
}
return num_dirty;
}
#endif /* not _WIN32 */

30
include/hw/char/parallel-isa.h Normal file
View File

@ -0,0 +1,30 @@
/*
* QEMU ISA Parallel PORT emulation
*
* Copyright (c) 2003-2005 Fabrice Bellard
* Copyright (c) 2007 Marko Kohtala
*
* SPDX-License-Identifier: MIT
*/
#ifndef HW_PARALLEL_ISA_H
#define HW_PARALLEL_ISA_H
#include "parallel.h"
#include "hw/isa/isa.h"
#include "qom/object.h"
#define TYPE_ISA_PARALLEL "isa-parallel"
OBJECT_DECLARE_SIMPLE_TYPE(ISAParallelState, ISA_PARALLEL)
struct ISAParallelState {
ISADevice parent_obj;
uint32_t index;
uint32_t iobase;
uint32_t isairq;
ParallelState state;
};
#endif /* HW_PARALLEL_ISA_H */

21
include/hw/char/parallel.h
View File

@ -1,10 +1,29 @@
#ifndef HW_PARALLEL_H
#define HW_PARALLEL_H
#include "exec/ioport.h"
#include "exec/memory.h"
#include "hw/isa/isa.h"
#include "hw/irq.h"
#include "chardev/char-fe.h"
#include "chardev/char.h"
#define TYPE_ISA_PARALLEL "isa-parallel"
typedef struct ParallelState {
MemoryRegion iomem;
uint8_t dataw;
uint8_t datar;
uint8_t status;
uint8_t control;
qemu_irq irq;
int irq_pending;
CharBackend chr;
int hw_driver;
int epp_timeout;
uint32_t last_read_offset; /* For debugging */
/* Memory-mapped interface */
int it_shift;
PortioList portio_list;
} ParallelState;
void parallel_hds_isa_init(ISABus *bus, int n);

10
linux-user/main.c
View File

@ -692,8 +692,16 @@ int main(int argc, char **argv, char **envp)
envlist = envlist_create();
/* add current environment into the list */
/*
* add current environment into the list
* envlist_setenv adds to the front of the list; to preserve environ
* order add from back to front
*/
for (wrk = environ; *wrk != NULL; wrk++) {
continue;
}
while (wrk != environ) {
wrk--;
(void) envlist_setenv(envlist, *wrk);
}

3
migration/ram.c
View File

@ -197,7 +197,8 @@ static bool postcopy_preempt_active(void)
bool ramblock_is_ignored(RAMBlock *block)
{
return !qemu_ram_is_migratable(block) ||
(migrate_ignore_shared() && qemu_ram_is_shared(block));
(migrate_ignore_shared() && qemu_ram_is_shared(block)
&& qemu_ram_is_named_file(block));
}
#undef RAMBLOCK_FOREACH

2
net/vmnet-bridged.m
View File

@ -37,7 +37,7 @@ done:
}
static char* get_valid_ifnames()
static char* get_valid_ifnames(void)
{
xpc_object_t shared_if_list = vmnet_copy_shared_interface_list();
__block char *if_list = NULL;

4
qapi/migration.json
View File

@ -465,8 +465,8 @@
# block devices (and thus take locks) immediately at the end of
# migration. (since 3.0)
#
# @x-ignore-shared: If enabled, QEMU will not migrate shared memory
# (since 4.0)
# @x-ignore-shared: If enabled, QEMU will not migrate shared memory that is
# accessible on the destination machine. (since 4.0)
#
# @validate-uuid: Send the UUID of the source to allow the destination
# to ensure it is the same. (since 4.2)

7
softmmu/physmem.c
View File

@ -1570,6 +1570,11 @@ void qemu_ram_unset_migratable(RAMBlock *rb)
rb->flags &= ~RAM_MIGRATABLE;
}
bool qemu_ram_is_named_file(RAMBlock *rb)
{
return rb->flags & RAM_NAMED_FILE;
}
int qemu_ram_get_fd(RAMBlock *rb)
{
return rb->fd;
@ -1880,7 +1885,7 @@ RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr,
/* Just support these ram flags by now. */
assert((ram_flags & ~(RAM_SHARED | RAM_PMEM | RAM_NORESERVE |
RAM_PROTECTED)) == 0);
RAM_PROTECTED | RAM_NAMED_FILE)) == 0);
if (xen_enabled()) {
error_setg(errp, "-mem-path not supported with Xen");

3
target/hppa/int_helper.c
View File

@ -25,7 +25,6 @@
#include "hw/core/cpu.h"
#include "hw/hppa/hppa_hardware.h"
#ifndef CONFIG_USER_ONLY
static void eval_interrupt(HPPACPU *cpu)
{
CPUState *cs = CPU(cpu);
@ -273,5 +272,3 @@ bool hppa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
}
return false;
}
#endif /* !CONFIG_USER_ONLY */

2
target/hppa/meson.build
View File

@ -7,13 +7,13 @@ hppa_ss.add(files(
'fpu_helper.c',
'gdbstub.c',
'helper.c',
'int_helper.c',
'op_helper.c',
'translate.c',
))
hppa_softmmu_ss = ss.source_set()
hppa_softmmu_ss.add(files(
'int_helper.c',
'machine.c',
'mem_helper.c',
'sys_helper.c',

3
target/i386/cpu.h
View File

@ -2285,7 +2285,6 @@ static inline void cpu_get_tb_cpu_state(CPUX86State *env, target_ulong *pc,
}
void do_cpu_init(X86CPU *cpu);
void do_cpu_sipi(X86CPU *cpu);
#define MCE_INJECT_BROADCAST 1
#define MCE_INJECT_UNCOND_AO 2
@ -2419,6 +2418,8 @@ void x86_cpu_set_default_version(X86CPUVersion version);
#ifndef CONFIG_USER_ONLY
void do_cpu_sipi(X86CPU *cpu);
#define APIC_DEFAULT_ADDRESS 0xfee00000
#define APIC_SPACE_SIZE 0x100000

15
target/i386/helper.c
View File

@ -580,9 +580,9 @@ int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector,
return 1;
}
#if !defined(CONFIG_USER_ONLY)
void do_cpu_init(X86CPU *cpu)
{
#if !defined(CONFIG_USER_ONLY)
CPUState *cs = CPU(cpu);
CPUX86State *env = &cpu->env;
CPUX86State *save = g_new(CPUX86State, 1);
@ -601,22 +601,15 @@ void do_cpu_init(X86CPU *cpu)
kvm_arch_do_init_vcpu(cpu);
}
apic_init_reset(cpu->apic_state);
#endif /* CONFIG_USER_ONLY */
}
#ifndef CONFIG_USER_ONLY
void do_cpu_sipi(X86CPU *cpu)
{
apic_sipi(cpu->apic_state);
}
#else
void do_cpu_init(X86CPU *cpu)
{
}
void do_cpu_sipi(X86CPU *cpu)
{
}
#endif
#ifndef CONFIG_USER_ONLY
void cpu_load_efer(CPUX86State *env, uint64_t val)
{

6
target/i386/helper.h
View File

@ -203,11 +203,11 @@ DEF_HELPER_1(enter_mmx, void, env)
DEF_HELPER_1(emms, void, env)
#define SHIFT 0
#include "ops_sse_header.h"
#include "tcg/ops_sse_header.h.inc"
#define SHIFT 1
#include "ops_sse_header.h"
#include "tcg/ops_sse_header.h.inc"
#define SHIFT 2
#include "ops_sse_header.h"
#include "tcg/ops_sse_header.h.inc"
DEF_HELPER_3(rclb, tl, env, tl, tl)
DEF_HELPER_3(rclw, tl, env, tl, tl)

8
target/i386/tcg/cc_helper.c
View File

@ -58,21 +58,21 @@ const uint8_t parity_table[256] = {
};
#define SHIFT 0
#include "cc_helper_template.h"
#include "cc_helper_template.h.inc"
#undef SHIFT
#define SHIFT 1
#include "cc_helper_template.h"
#include "cc_helper_template.h.inc"
#undef SHIFT
#define SHIFT 2
#include "cc_helper_template.h"
#include "cc_helper_template.h.inc"
#undef SHIFT
#ifdef TARGET_X86_64
#define SHIFT 3
#include "cc_helper_template.h"
#include "cc_helper_template.h.inc"
#undef SHIFT
#endif

0
target/i386/tcg/cc_helper_template.h → target/i386/tcg/cc_helper_template.h.inc
View File

8
target/i386/tcg/int_helper.c
View File

@ -448,20 +448,20 @@ target_ulong helper_pext(target_ulong src, target_ulong mask)
}
#define SHIFT 0
#include "shift_helper_template.h"
#include "shift_helper_template.h.inc"
#undef SHIFT
#define SHIFT 1
#include "shift_helper_template.h"
#include "shift_helper_template.h.inc"
#undef SHIFT
#define SHIFT 2
#include "shift_helper_template.h"
#include "shift_helper_template.h.inc"
#undef SHIFT
#ifdef TARGET_X86_64
#define SHIFT 3
#include "shift_helper_template.h"
#include "shift_helper_template.h.inc"
#undef SHIFT
#endif

0
target/i386/ops_sse_header.h → target/i386/tcg/ops_sse_header.h.inc
View File

0
target/i386/shift_helper_template.h → target/i386/tcg/shift_helper_template.h.inc
View File

2
ui/cocoa.m
View File

@ -1934,7 +1934,7 @@ static void *call_qemu_main(void *opaque)
exit(status);
}
static int cocoa_main()
static int cocoa_main(void)
{
QemuThread thread;

13
util/cacheflush.c
View File

@ -237,11 +237,18 @@ static void __attribute__((constructor)) init_cache_info(void)
#ifdef CONFIG_DARWIN
/* Apple does not expose CTR_EL0, so we must use system interfaces. */
extern void sys_icache_invalidate(void *start, size_t len);
extern void sys_dcache_flush(void *start, size_t len);
#include <libkern/OSCacheControl.h>
void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len)
{
sys_dcache_flush((void *)rw, len);
if (rx == rw) {
/*
* sys_icache_invalidate() syncs the dcache and icache,
* so no need to call sys_dcache_flush().
*/
} else {
sys_dcache_flush((void *)rw, len);
}
sys_icache_invalidate((void *)rx, len);
}
#else