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microblaze: Add definitions for FSR reg fields 

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
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Edgar E. Iglesias 2010-09-09 09:58:35 +02:00 committed by Edgar E. Iglesias
parent 8b33d9eeba
commit bdc0bf29c6
1 changed files with 7 additions and 0 deletions
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7
target-microblaze/cpu.h
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@ -91,6 +91,13 @@ struct CPUMBState;
#define ESR_EC_DATA_TLB 10
#define ESR_EC_INSN_TLB 11
/* Floating Point Status Register (FSR) Bits */
#define FSR_IO (1<<4) /* Invalid operation */
#define FSR_DZ (1<<3) /* Divide-by-zero */
#define FSR_OF (1<<2) /* Overflow */
#define FSR_UF (1<<1) /* Underflow */
#define FSR_DO (1<<0) /* Denormalized operand error */
/* Version reg. */
/* Basic PVR mask */
#define PVR0_PVR_FULL_MASK 0x80000000