mirror of https://github.com/xemu-project/xemu.git
hw/i386/acpi-build: Remove build-time assertion on PIIX/ICH9 reset registers being identical
Commit6103451aeb
("hw/i386: Build-time assertion on pc/q35 reset register being identical.") introduced a build-time check where the addresses of the reset registers are expected to be equal. Back then rev3 of the FADT was used which required the reset register to be populated and there was common code. In commit3a3fcc75f9
("pc: acpi: force FADT rev1 for 440fx based machine types") the FADT was downgraded to rev1 for PIIX where the reset register isn't available. Thus, there is no need for the assertion any longer, so remove it. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231004092355.12929-1-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -56,7 +56,6 @@
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/* Supported chipsets: */
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#include "hw/southbridge/ich9.h"
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#include "hw/southbridge/piix.h"
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#include "hw/acpi/pcihp.h"
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#include "hw/i386/fw_cfg.h"
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#include "hw/i386/pc.h"
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@ -242,10 +241,6 @@ static void acpi_get_pm_info(MachineState *machine, AcpiPmInfo *pm)
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pm->pcihp_io_len =
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object_property_get_uint(obj, ACPI_PCIHP_IO_LEN_PROP, NULL);
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/* The above need not be conditional on machine type because the reset port
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* happens to be the same on PIIX (pc) and ICH9 (q35). */
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QEMU_BUILD_BUG_ON(ICH9_RST_CNT_IOPORT != PIIX_RCR_IOPORT);
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/* Fill in optional s3/s4 related properties */
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o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL);
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if (o) {
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