mirror of https://github.com/xemu-project/xemu.git
target/hppa: Implement EXTRD
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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72ae4f2b82
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target/hppa
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@ -335,8 +335,11 @@ addbi 101011 ..... ..... ... ........... . . @rib_cf f=1
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shrpw_sar 110100 r2:5 r1:5 c:3 00 0 00000 t:5
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shrpw_imm 110100 r2:5 r1:5 c:3 01 0 cpos:5 t:5
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extrw_sar 110100 r:5 t:5 c:3 10 se:1 00000 clen:5
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extrw_imm 110100 r:5 t:5 c:3 11 se:1 pos:5 clen:5
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extr_sar 110100 r:5 t:5 c:3 10 se:1 00 000 ..... d=0 len=%len5
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extr_sar 110100 r:5 t:5 c:3 10 se:1 1. 000 ..... d=1 len=%len6_8
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extr_imm 110100 r:5 t:5 c:3 11 se:1 pos:5 ..... d=0 len=%len5
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extr_imm 110110 r:5 t:5 c:3 .. se:1 ..... ..... \
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d=1 len=%len6_12 pos=%cpos6_11
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dep_sar 110101 t:5 r:5 c:3 00 nz:1 00 000 ..... d=0 len=%len5
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dep_sar 110101 t:5 r:5 c:3 00 nz:1 1. 000 ..... d=1 len=%len6_8
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@ -3354,11 +3354,14 @@ static bool trans_shrpw_imm(DisasContext *ctx, arg_shrpw_imm *a)
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return nullify_end(ctx);
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}
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static bool trans_extrw_sar(DisasContext *ctx, arg_extrw_sar *a)
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static bool trans_extr_sar(DisasContext *ctx, arg_extr_sar *a)
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{
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unsigned len = 32 - a->clen;
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unsigned widthm1 = a->d ? 63 : 31;
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TCGv_reg dest, src, tmp;
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if (!ctx->is_pa20 && a->d) {
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return false;
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}
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if (a->c) {
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nullify_over(ctx);
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}
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@ -3368,36 +3371,53 @@ static bool trans_extrw_sar(DisasContext *ctx, arg_extrw_sar *a)
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tmp = tcg_temp_new();
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/* Recall that SAR is using big-endian bit numbering. */
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tcg_gen_andi_reg(tmp, cpu_sar, 31);
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tcg_gen_xori_reg(tmp, tmp, 31);
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tcg_gen_andi_reg(tmp, cpu_sar, widthm1);
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tcg_gen_xori_reg(tmp, tmp, widthm1);
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if (a->se) {
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if (!a->d) {
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tcg_gen_ext32s_reg(dest, src);
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src = dest;
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}
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tcg_gen_sar_reg(dest, src, tmp);
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tcg_gen_sextract_reg(dest, dest, 0, len);
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tcg_gen_sextract_reg(dest, dest, 0, a->len);
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} else {
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if (!a->d) {
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tcg_gen_ext32u_reg(dest, src);
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src = dest;
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}
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tcg_gen_shr_reg(dest, src, tmp);
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tcg_gen_extract_reg(dest, dest, 0, len);
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tcg_gen_extract_reg(dest, dest, 0, a->len);
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}
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save_gpr(ctx, a->t, dest);
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/* Install the new nullification. */
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cond_free(&ctx->null_cond);
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if (a->c) {
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ctx->null_cond = do_sed_cond(ctx, a->c, false, dest);
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ctx->null_cond = do_sed_cond(ctx, a->c, a->d, dest);
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}
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return nullify_end(ctx);
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}
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static bool trans_extrw_imm(DisasContext *ctx, arg_extrw_imm *a)
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static bool trans_extr_imm(DisasContext *ctx, arg_extr_imm *a)
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{
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unsigned len = 32 - a->clen;
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unsigned cpos = 31 - a->pos;
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unsigned len, cpos, width;
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TCGv_reg dest, src;
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if (!ctx->is_pa20 && a->d) {
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return false;
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}
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if (a->c) {
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nullify_over(ctx);
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}
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len = a->len;
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width = a->d ? 64 : 32;
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cpos = width - 1 - a->pos;
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if (cpos + len > width) {
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len = width - cpos;
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}
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dest = dest_gpr(ctx, a->t);
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src = load_gpr(ctx, a->r);
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if (a->se) {
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@ -3410,7 +3430,7 @@ static bool trans_extrw_imm(DisasContext *ctx, arg_extrw_imm *a)
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/* Install the new nullification. */
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cond_free(&ctx->null_cond);
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if (a->c) {
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ctx->null_cond = do_sed_cond(ctx, a->c, false, dest);
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ctx->null_cond = do_sed_cond(ctx, a->c, a->d, dest);
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}
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return nullify_end(ctx);
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}
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