From b8a208ccf51013a88eb410a7820a4951834a913f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= Date: Thu, 30 May 2024 20:42:46 +0100 Subject: [PATCH] hw/core: expand on the alignment of CPUState MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make the relationship between CPUState, ArchCPU and cpu_env a bit clearer in the kdoc comments. Signed-off-by: Alex Bennée Reviewed-by: Pierrick Bouvier Message-ID: <20240530194250.1801701-2-alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index bb398e8237..be44746d24 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -391,7 +391,8 @@ struct qemu_work_item; #define CPU_UNSET_NUMA_NODE_ID -1 /** - * CPUState: + * struct CPUState - common state of one CPU core or thread. + * * @cpu_index: CPU index (informative). * @cluster_index: Identifies which cluster this CPU is in. * For boards which don't define clusters or for "loose" CPUs not assigned @@ -439,10 +440,15 @@ struct qemu_work_item; * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU * dirty ring structure. * - * State of one CPU core or thread. + * @neg_align: The CPUState is the common part of a concrete ArchCPU + * which is allocated when an individual CPU instance is created. As + * such care is taken is ensure there is no gap between between + * CPUState and CPUArchState within ArchCPU. * - * Align, in order to match possible alignment required by CPUArchState, - * and eliminate a hole between CPUState and CPUArchState within ArchCPU. + * @neg: The architectural register state ("cpu_env") immediately follows + * CPUState in ArchCPU and is passed to TCG code. The @neg structure holds + * some common TCG CPU variables which are accessed with a negative offset + * from cpu_env. */ struct CPUState { /*< private >*/