mirror of https://github.com/xemu-project/xemu.git
trivial patches for 2024-06-30
-----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmaBjTkACgkQcBtPaxpp PlmhAAf+PZEsiBvffwwNH5n1q39Hilih35p/GCVpNYKcLsFB6bLmt9A/x062NqTS ob1Uj134ofHlSQtNjP1KxXdriwc40ZMahkTO+x6gYc+IpoRJGTGYEA0MWh4gPPYK S6l/nOI9JK1x+ot+bQzGOzOjz3/S7RJteXzwOPlWQ7GChz8NIUPWV3DkcVP0AeT0 7Lq7GtDBSV5Jbne2IrvOGadjPOpJiiLEmLawmw1c9qapIKAu2wxNBMlO98ufsg6L hDFEg6K0CKvM9fcdK8UXhnMa+58QwHhoJT+Q00aQcU1xzu+ifi/CrmgbRCK5ruTA o0I8q6ONbK33cTzyZ/ZmKtoA8b/Rzw== =N3GX -----END PGP SIGNATURE----- Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging trivial patches for 2024-06-30 # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmaBjTkACgkQcBtPaxpp # PlmhAAf+PZEsiBvffwwNH5n1q39Hilih35p/GCVpNYKcLsFB6bLmt9A/x062NqTS # ob1Uj134ofHlSQtNjP1KxXdriwc40ZMahkTO+x6gYc+IpoRJGTGYEA0MWh4gPPYK # S6l/nOI9JK1x+ot+bQzGOzOjz3/S7RJteXzwOPlWQ7GChz8NIUPWV3DkcVP0AeT0 # 7Lq7GtDBSV5Jbne2IrvOGadjPOpJiiLEmLawmw1c9qapIKAu2wxNBMlO98ufsg6L # hDFEg6K0CKvM9fcdK8UXhnMa+58QwHhoJT+Q00aQcU1xzu+ifi/CrmgbRCK5ruTA # o0I8q6ONbK33cTzyZ/ZmKtoA8b/Rzw== # =N3GX # -----END PGP SIGNATURE----- # gpg: Signature made Sun 30 Jun 2024 09:52:09 AM PDT # gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59 # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full] # gpg: aka "Michael Tokarev <mjt@debian.org>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: hw/core/loader: gunzip(): fix memory leak on error path vl.c: select_machine(): add selected machine type to error message vl.c: select_machine(): use g_autoptr vl.c: select_machine(): use ERRP_GUARD instead of error propagation docs/system/devices/usb: Replace the non-existing "qemu" binary docs/cxl: fix some typos os-posix: Expand setrlimit() syscall compatibility net/can: Remove unused struct 'CanBusState' hw/arm/bcm2836: Remove unusued struct 'BCM283XClass' linux-user: sparc: Remove unused struct 'target_mc_fq' linux-user: cris: Remove unused struct 'rt_signal_frame' monitor: Remove obsolete stubs target/i386: Advertise MWAIT iff host supports vl: Allow multiple -overcommit commands cpu: fix memleak of 'halt_cond' and 'thread' hmp-commands-info.hx: Add missing info command for stats subcommand Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
commit
b6d32a06fc
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@ -329,6 +329,7 @@ void rr_start_vcpu_thread(CPUState *cpu)
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/* we share the thread, dump spare data */
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g_free(cpu->thread);
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qemu_cond_destroy(cpu->halt_cond);
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g_free(cpu->halt_cond);
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cpu->thread = single_tcg_cpu_thread;
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cpu->halt_cond = single_tcg_halt_cond;
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@ -218,17 +218,17 @@ Notes:
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A complex configuration here, might be to use the following HDM
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decoders in HB0. HDM0 routes CFMW0 requests to RP0 and hence
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part of CXL Type3 0. HDM1 routes CFMW0 requests from a
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different region of the CFMW0 PA range to RP2 and hence part
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different region of the CFMW0 PA range to RP1 and hence part
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of CXL Type 3 1. HDM2 routes yet another PA range from within
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CFMW0 to be interleaved across RP0 and RP1, providing 2 way
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interleave of part of the memory provided by CXL Type3 0 and
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CXL Type 3 1. HDM3 routes those interleaved accesses from
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CFMW1 that target HB0 to RP 0 and another part of the memory of
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CXL Type 3 0 (as part of a 2 way interleave at the system level
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across for example CXL Type3 0 and CXL Type3 2.
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across for example CXL Type3 0 and CXL Type3 2).
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HDM4 is used to enable system wide 4 way interleave across all
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the present CXL type3 devices, by interleaving those (interleaved)
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requests that HB0 receives from from CFMW1 across RP 0 and
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requests that HB0 receives from CFMW1 across RP 0 and
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RP 1 and hence to yet more regions of the memory of the
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attached Type3 devices. Note this is a representative subset
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of the full range of possible HDM decoder configurations in this
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@ -18,7 +18,7 @@ emulation uses less resources (especially CPU). So if your guest
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supports XHCI (which should be the case for any operating system
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released around 2010 or later) we recommend using it:
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qemu -device qemu-xhci
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|qemu_system| -device qemu-xhci
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XHCI supports USB 1.1, USB 2.0 and USB 3.0 devices, so this is the
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only controller you need. With only a single USB controller (and
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@ -892,7 +892,7 @@ ERST
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},
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SRST
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``stats``
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``info stats``
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Show runtime-collected statistics
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ERST
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@ -18,18 +18,6 @@
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#include "target/arm/cpu-qom.h"
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#include "target/arm/gtimer.h"
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struct BCM283XClass {
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/*< private >*/
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DeviceClass parent_class;
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/*< public >*/
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const char *name;
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const char *cpu_type;
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unsigned core_count;
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hwaddr peri_base; /* Peripheral base address seen by the CPU */
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hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
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int clusterid;
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};
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static Property bcm2836_enabled_cores_property =
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DEFINE_PROP_UINT32("enabled-cpus", BCM283XBaseState, enabled_cpus, 0);
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@ -286,6 +286,9 @@ static void cpu_common_finalize(Object *obj)
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g_array_free(cpu->gdb_regs, TRUE);
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qemu_lockcnt_destroy(&cpu->in_ioctl_lock);
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qemu_mutex_destroy(&cpu->work_mutex);
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qemu_cond_destroy(cpu->halt_cond);
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g_free(cpu->halt_cond);
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g_free(cpu->thread);
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}
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static int64_t cpu_common_get_arch_id(CPUState *cpu)
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@ -610,6 +610,7 @@ ssize_t gunzip(void *dst, size_t dstlen, uint8_t *src, size_t srclen)
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r = inflate(&s, Z_FINISH);
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if (r != Z_OK && r != Z_STREAM_END) {
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printf ("Error: inflate() returned %d\n", r);
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inflateEnd(&s);
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return -1;
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}
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dstbytes = s.next_out - (unsigned char *) dst;
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@ -338,7 +338,6 @@ void *rom_ptr(hwaddr addr, size_t size);
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* rom_ptr().
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*/
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void *rom_ptr_for_as(AddressSpace *as, hwaddr addr, size_t size);
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void hmp_info_roms(Monitor *mon, const QDict *qdict);
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#define rom_add_file_fixed(_f, _a, _i) \
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rom_add_file(_f, NULL, _a, _i, false, NULL, NULL)
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@ -35,7 +35,6 @@ void hmp_info_cpus(Monitor *mon, const QDict *qdict);
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void hmp_info_vnc(Monitor *mon, const QDict *qdict);
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void hmp_info_spice(Monitor *mon, const QDict *qdict);
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void hmp_info_balloon(Monitor *mon, const QDict *qdict);
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void hmp_info_irq(Monitor *mon, const QDict *qdict);
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void hmp_info_pic(Monitor *mon, const QDict *qdict);
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void hmp_info_pci(Monitor *mon, const QDict *qdict);
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void hmp_info_tpm(Monitor *mon, const QDict *qdict);
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@ -102,7 +101,6 @@ void hmp_chardev_send_break(Monitor *mon, const QDict *qdict);
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void hmp_object_add(Monitor *mon, const QDict *qdict);
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void hmp_object_del(Monitor *mon, const QDict *qdict);
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void hmp_info_memdev(Monitor *mon, const QDict *qdict);
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void hmp_info_numa(Monitor *mon, const QDict *qdict);
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void hmp_info_memory_devices(Monitor *mon, const QDict *qdict);
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void hmp_qom_list(Monitor *mon, const QDict *qdict);
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void hmp_qom_get(Monitor *mon, const QDict *qdict);
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@ -141,7 +139,6 @@ void hmp_rocker_ports(Monitor *mon, const QDict *qdict);
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void hmp_rocker_of_dpa_flows(Monitor *mon, const QDict *qdict);
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void hmp_rocker_of_dpa_groups(Monitor *mon, const QDict *qdict);
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void hmp_info_dump(Monitor *mon, const QDict *qdict);
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void hmp_info_ramblock(Monitor *mon, const QDict *qdict);
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void hmp_hotpluggable_cpus(Monitor *mon, const QDict *qdict);
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void hmp_info_vm_generation_id(Monitor *mon, const QDict *qdict);
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void hmp_info_memory_size_summary(Monitor *mon, const QDict *qdict);
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@ -35,14 +35,6 @@ struct target_signal_frame {
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uint16_t retcode[4]; /* Trampoline code. */
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};
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struct rt_signal_frame {
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siginfo_t *pinfo;
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void *puc;
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siginfo_t info;
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ucontext_t uc;
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uint16_t retcode[4]; /* Trampoline code. */
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};
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static void setup_sigcontext(struct target_sigcontext *sc, CPUCRISState *env)
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{
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__put_user(env->regs[0], &sc->regs.r0);
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@ -546,11 +546,6 @@ void setup_sigtramp(abi_ulong sigtramp_page)
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typedef abi_ulong target_mc_greg_t;
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typedef target_mc_greg_t target_mc_gregset_t[SPARC_MC_NGREG];
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struct target_mc_fq {
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abi_ulong mcfq_addr;
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uint32_t mcfq_insn;
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};
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/*
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* Note the manual 16-alignment; the kernel gets this because it
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* includes a "long double qregs[16]" in the mcpu_fregs union,
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@ -34,12 +34,6 @@
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#include "net/can_emu.h"
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#include "net/can_host.h"
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struct CanBusState {
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Object object;
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QTAILQ_HEAD(, CanBusClientState) clients;
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};
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static void can_host_disconnect(CanHostState *ch)
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{
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CanHostClass *chc = CAN_HOST_GET_CLASS(ch);
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@ -270,7 +270,11 @@ void os_setup_limits(void)
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return;
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}
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#ifdef CONFIG_DARWIN
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nofile.rlim_cur = OPEN_MAX < nofile.rlim_max ? OPEN_MAX : nofile.rlim_max;
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#else
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nofile.rlim_cur = nofile.rlim_max;
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#endif
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if (setrlimit(RLIMIT_NOFILE, &nofile) < 0) {
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warn_report("unable to set NOFILE limit: %s", strerror(errno));
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21
system/vl.c
21
system/vl.c
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@ -1665,28 +1665,27 @@ static const QEMUOption *lookup_opt(int argc, char **argv,
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static MachineClass *select_machine(QDict *qdict, Error **errp)
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{
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ERRP_GUARD();
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const char *machine_type = qdict_get_try_str(qdict, "type");
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GSList *machines = object_class_get_list(TYPE_MACHINE, false);
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MachineClass *machine_class;
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Error *local_err = NULL;
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g_autoptr(GSList) machines = object_class_get_list(TYPE_MACHINE, false);
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MachineClass *machine_class = NULL;
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if (machine_type) {
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machine_class = find_machine(machine_type, machines);
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qdict_del(qdict, "type");
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if (!machine_class) {
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error_setg(&local_err, "unsupported machine type");
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error_setg(errp, "unsupported machine type: \"%s\"", optarg);
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}
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} else {
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machine_class = find_default_machine(machines);
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if (!machine_class) {
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error_setg(&local_err, "No machine specified, and there is no default");
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error_setg(errp, "No machine specified, and there is no default");
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}
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}
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g_slist_free(machines);
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if (local_err) {
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error_append_hint(&local_err, "Use -machine help to list supported machines\n");
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error_propagate(errp, local_err);
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if (!machine_class) {
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error_append_hint(errp,
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"Use -machine help to list supported machines\n");
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}
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return machine_class;
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}
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@ -3546,8 +3545,8 @@ void qemu_init(int argc, char **argv)
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if (!opts) {
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exit(1);
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}
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enable_mlock = qemu_opt_get_bool(opts, "mem-lock", false);
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enable_cpu_pm = qemu_opt_get_bool(opts, "cpu-pm", false);
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enable_mlock = qemu_opt_get_bool(opts, "mem-lock", enable_mlock);
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enable_cpu_pm = qemu_opt_get_bool(opts, "cpu-pm", enable_cpu_pm);
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break;
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case QEMU_OPTION_compat:
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{
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@ -42,15 +42,6 @@ static uint32_t host_cpu_phys_bits(void)
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return host_phys_bits;
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}
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static void host_cpu_enable_cpu_pm(X86CPU *cpu)
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{
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CPUX86State *env = &cpu->env;
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host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
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&cpu->mwait.ecx, &cpu->mwait.edx);
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env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR;
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}
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static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu)
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{
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uint32_t host_phys_bits = host_cpu_phys_bits();
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@ -83,9 +74,6 @@ bool host_cpu_realizefn(CPUState *cs, Error **errp)
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X86CPU *cpu = X86_CPU(cs);
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CPUX86State *env = &cpu->env;
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if (cpu->max_features && enable_cpu_pm) {
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host_cpu_enable_cpu_pm(cpu);
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}
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if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
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uint32_t phys_bits = host_cpu_adjust_phys_bits(cpu);
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@ -64,9 +64,16 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
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* cpu_common_realizefn() (via xcc->parent_realize)
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*/
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if (cpu->max_features) {
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if (enable_cpu_pm && kvm_has_waitpkg()) {
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if (enable_cpu_pm) {
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if (kvm_has_waitpkg()) {
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env->features[FEAT_7_0_ECX] |= CPUID_7_0_ECX_WAITPKG;
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}
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if (env->features[FEAT_1_ECX] & CPUID_EXT_MONITOR) {
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host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
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&cpu->mwait.ecx, &cpu->mwait.edx);
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}
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}
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if (cpu->ucode_rev == 0) {
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cpu->ucode_rev =
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kvm_arch_get_supported_msr_feature(kvm_state,
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