trivial patches for 2024-06-30

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Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging

trivial patches for 2024-06-30

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# gpg: Signature made Sun 30 Jun 2024 09:52:09 AM PDT
# gpg:                using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full]
# gpg:                 aka "Michael Tokarev <mjt@debian.org>" [full]
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>" [full]

* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:
  hw/core/loader: gunzip(): fix memory leak on error path
  vl.c: select_machine(): add selected machine type to error message
  vl.c: select_machine(): use g_autoptr
  vl.c: select_machine(): use ERRP_GUARD instead of error propagation
  docs/system/devices/usb: Replace the non-existing "qemu" binary
  docs/cxl: fix some typos
  os-posix: Expand setrlimit() syscall compatibility
  net/can: Remove unused struct 'CanBusState'
  hw/arm/bcm2836: Remove unusued struct 'BCM283XClass'
  linux-user: sparc: Remove unused struct 'target_mc_fq'
  linux-user: cris: Remove unused struct 'rt_signal_frame'
  monitor: Remove obsolete stubs
  target/i386: Advertise MWAIT iff host supports
  vl: Allow multiple -overcommit commands
  cpu: fix memleak of 'halt_cond' and 'thread'
  hmp-commands-info.hx: Add missing info command for stats subcommand

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-06-30 16:12:24 -07:00
commit b6d32a06fc
16 changed files with 33 additions and 65 deletions

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@ -329,6 +329,7 @@ void rr_start_vcpu_thread(CPUState *cpu)
/* we share the thread, dump spare data */
g_free(cpu->thread);
qemu_cond_destroy(cpu->halt_cond);
g_free(cpu->halt_cond);
cpu->thread = single_tcg_cpu_thread;
cpu->halt_cond = single_tcg_halt_cond;

View File

@ -218,17 +218,17 @@ Notes:
A complex configuration here, might be to use the following HDM
decoders in HB0. HDM0 routes CFMW0 requests to RP0 and hence
part of CXL Type3 0. HDM1 routes CFMW0 requests from a
different region of the CFMW0 PA range to RP2 and hence part
different region of the CFMW0 PA range to RP1 and hence part
of CXL Type 3 1. HDM2 routes yet another PA range from within
CFMW0 to be interleaved across RP0 and RP1, providing 2 way
interleave of part of the memory provided by CXL Type3 0 and
CXL Type 3 1. HDM3 routes those interleaved accesses from
CFMW1 that target HB0 to RP 0 and another part of the memory of
CXL Type 3 0 (as part of a 2 way interleave at the system level
across for example CXL Type3 0 and CXL Type3 2.
across for example CXL Type3 0 and CXL Type3 2).
HDM4 is used to enable system wide 4 way interleave across all
the present CXL type3 devices, by interleaving those (interleaved)
requests that HB0 receives from from CFMW1 across RP 0 and
requests that HB0 receives from CFMW1 across RP 0 and
RP 1 and hence to yet more regions of the memory of the
attached Type3 devices. Note this is a representative subset
of the full range of possible HDM decoder configurations in this

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@ -18,7 +18,7 @@ emulation uses less resources (especially CPU). So if your guest
supports XHCI (which should be the case for any operating system
released around 2010 or later) we recommend using it:
qemu -device qemu-xhci
|qemu_system| -device qemu-xhci
XHCI supports USB 1.1, USB 2.0 and USB 3.0 devices, so this is the
only controller you need. With only a single USB controller (and

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@ -892,7 +892,7 @@ ERST
},
SRST
``stats``
``info stats``
Show runtime-collected statistics
ERST

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@ -18,18 +18,6 @@
#include "target/arm/cpu-qom.h"
#include "target/arm/gtimer.h"
struct BCM283XClass {
/*< private >*/
DeviceClass parent_class;
/*< public >*/
const char *name;
const char *cpu_type;
unsigned core_count;
hwaddr peri_base; /* Peripheral base address seen by the CPU */
hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
int clusterid;
};
static Property bcm2836_enabled_cores_property =
DEFINE_PROP_UINT32("enabled-cpus", BCM283XBaseState, enabled_cpus, 0);

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@ -286,6 +286,9 @@ static void cpu_common_finalize(Object *obj)
g_array_free(cpu->gdb_regs, TRUE);
qemu_lockcnt_destroy(&cpu->in_ioctl_lock);
qemu_mutex_destroy(&cpu->work_mutex);
qemu_cond_destroy(cpu->halt_cond);
g_free(cpu->halt_cond);
g_free(cpu->thread);
}
static int64_t cpu_common_get_arch_id(CPUState *cpu)

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@ -610,6 +610,7 @@ ssize_t gunzip(void *dst, size_t dstlen, uint8_t *src, size_t srclen)
r = inflate(&s, Z_FINISH);
if (r != Z_OK && r != Z_STREAM_END) {
printf ("Error: inflate() returned %d\n", r);
inflateEnd(&s);
return -1;
}
dstbytes = s.next_out - (unsigned char *) dst;

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@ -338,7 +338,6 @@ void *rom_ptr(hwaddr addr, size_t size);
* rom_ptr().
*/
void *rom_ptr_for_as(AddressSpace *as, hwaddr addr, size_t size);
void hmp_info_roms(Monitor *mon, const QDict *qdict);
#define rom_add_file_fixed(_f, _a, _i) \
rom_add_file(_f, NULL, _a, _i, false, NULL, NULL)

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@ -35,7 +35,6 @@ void hmp_info_cpus(Monitor *mon, const QDict *qdict);
void hmp_info_vnc(Monitor *mon, const QDict *qdict);
void hmp_info_spice(Monitor *mon, const QDict *qdict);
void hmp_info_balloon(Monitor *mon, const QDict *qdict);
void hmp_info_irq(Monitor *mon, const QDict *qdict);
void hmp_info_pic(Monitor *mon, const QDict *qdict);
void hmp_info_pci(Monitor *mon, const QDict *qdict);
void hmp_info_tpm(Monitor *mon, const QDict *qdict);
@ -102,7 +101,6 @@ void hmp_chardev_send_break(Monitor *mon, const QDict *qdict);
void hmp_object_add(Monitor *mon, const QDict *qdict);
void hmp_object_del(Monitor *mon, const QDict *qdict);
void hmp_info_memdev(Monitor *mon, const QDict *qdict);
void hmp_info_numa(Monitor *mon, const QDict *qdict);
void hmp_info_memory_devices(Monitor *mon, const QDict *qdict);
void hmp_qom_list(Monitor *mon, const QDict *qdict);
void hmp_qom_get(Monitor *mon, const QDict *qdict);
@ -141,7 +139,6 @@ void hmp_rocker_ports(Monitor *mon, const QDict *qdict);
void hmp_rocker_of_dpa_flows(Monitor *mon, const QDict *qdict);
void hmp_rocker_of_dpa_groups(Monitor *mon, const QDict *qdict);
void hmp_info_dump(Monitor *mon, const QDict *qdict);
void hmp_info_ramblock(Monitor *mon, const QDict *qdict);
void hmp_hotpluggable_cpus(Monitor *mon, const QDict *qdict);
void hmp_info_vm_generation_id(Monitor *mon, const QDict *qdict);
void hmp_info_memory_size_summary(Monitor *mon, const QDict *qdict);

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@ -35,14 +35,6 @@ struct target_signal_frame {
uint16_t retcode[4]; /* Trampoline code. */
};
struct rt_signal_frame {
siginfo_t *pinfo;
void *puc;
siginfo_t info;
ucontext_t uc;
uint16_t retcode[4]; /* Trampoline code. */
};
static void setup_sigcontext(struct target_sigcontext *sc, CPUCRISState *env)
{
__put_user(env->regs[0], &sc->regs.r0);

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@ -546,11 +546,6 @@ void setup_sigtramp(abi_ulong sigtramp_page)
typedef abi_ulong target_mc_greg_t;
typedef target_mc_greg_t target_mc_gregset_t[SPARC_MC_NGREG];
struct target_mc_fq {
abi_ulong mcfq_addr;
uint32_t mcfq_insn;
};
/*
* Note the manual 16-alignment; the kernel gets this because it
* includes a "long double qregs[16]" in the mcpu_fregs union,

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@ -34,12 +34,6 @@
#include "net/can_emu.h"
#include "net/can_host.h"
struct CanBusState {
Object object;
QTAILQ_HEAD(, CanBusClientState) clients;
};
static void can_host_disconnect(CanHostState *ch)
{
CanHostClass *chc = CAN_HOST_GET_CLASS(ch);

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@ -270,7 +270,11 @@ void os_setup_limits(void)
return;
}
#ifdef CONFIG_DARWIN
nofile.rlim_cur = OPEN_MAX < nofile.rlim_max ? OPEN_MAX : nofile.rlim_max;
#else
nofile.rlim_cur = nofile.rlim_max;
#endif
if (setrlimit(RLIMIT_NOFILE, &nofile) < 0) {
warn_report("unable to set NOFILE limit: %s", strerror(errno));

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@ -1665,28 +1665,27 @@ static const QEMUOption *lookup_opt(int argc, char **argv,
static MachineClass *select_machine(QDict *qdict, Error **errp)
{
ERRP_GUARD();
const char *machine_type = qdict_get_try_str(qdict, "type");
GSList *machines = object_class_get_list(TYPE_MACHINE, false);
MachineClass *machine_class;
Error *local_err = NULL;
g_autoptr(GSList) machines = object_class_get_list(TYPE_MACHINE, false);
MachineClass *machine_class = NULL;
if (machine_type) {
machine_class = find_machine(machine_type, machines);
qdict_del(qdict, "type");
if (!machine_class) {
error_setg(&local_err, "unsupported machine type");
error_setg(errp, "unsupported machine type: \"%s\"", optarg);
}
} else {
machine_class = find_default_machine(machines);
if (!machine_class) {
error_setg(&local_err, "No machine specified, and there is no default");
error_setg(errp, "No machine specified, and there is no default");
}
}
g_slist_free(machines);
if (local_err) {
error_append_hint(&local_err, "Use -machine help to list supported machines\n");
error_propagate(errp, local_err);
if (!machine_class) {
error_append_hint(errp,
"Use -machine help to list supported machines\n");
}
return machine_class;
}
@ -3546,8 +3545,8 @@ void qemu_init(int argc, char **argv)
if (!opts) {
exit(1);
}
enable_mlock = qemu_opt_get_bool(opts, "mem-lock", false);
enable_cpu_pm = qemu_opt_get_bool(opts, "cpu-pm", false);
enable_mlock = qemu_opt_get_bool(opts, "mem-lock", enable_mlock);
enable_cpu_pm = qemu_opt_get_bool(opts, "cpu-pm", enable_cpu_pm);
break;
case QEMU_OPTION_compat:
{

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@ -42,15 +42,6 @@ static uint32_t host_cpu_phys_bits(void)
return host_phys_bits;
}
static void host_cpu_enable_cpu_pm(X86CPU *cpu)
{
CPUX86State *env = &cpu->env;
host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
&cpu->mwait.ecx, &cpu->mwait.edx);
env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR;
}
static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu)
{
uint32_t host_phys_bits = host_cpu_phys_bits();
@ -83,9 +74,6 @@ bool host_cpu_realizefn(CPUState *cs, Error **errp)
X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env;
if (cpu->max_features && enable_cpu_pm) {
host_cpu_enable_cpu_pm(cpu);
}
if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
uint32_t phys_bits = host_cpu_adjust_phys_bits(cpu);

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@ -64,9 +64,16 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
* cpu_common_realizefn() (via xcc->parent_realize)
*/
if (cpu->max_features) {
if (enable_cpu_pm && kvm_has_waitpkg()) {
if (enable_cpu_pm) {
if (kvm_has_waitpkg()) {
env->features[FEAT_7_0_ECX] |= CPUID_7_0_ECX_WAITPKG;
}
if (env->features[FEAT_1_ECX] & CPUID_EXT_MONITOR) {
host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
&cpu->mwait.ecx, &cpu->mwait.edx);
}
}
if (cpu->ucode_rev == 0) {
cpu->ucode_rev =
kvm_arch_get_supported_msr_feature(kvm_state,