mirror of https://github.com/xemu-project/xemu.git
target/hppa: Pass d to do_log_cond
Hoist the resolution of d up one level above do_log_cond. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -983,9 +983,11 @@ static DisasCond do_sub_cond(DisasContext *ctx, unsigned cf, bool d,
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* how cases c={2,3} are treated.
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*/
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static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, TCGv_reg res)
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static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, bool d,
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TCGv_reg res)
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{
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bool d = false;
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TCGCond tc;
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bool ext_uns;
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switch (cf) {
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case 0: /* never */
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@ -1001,17 +1003,29 @@ static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, TCGv_reg res)
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return cond_make_t();
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case 2: /* == */
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return cond_make_0(TCG_COND_EQ, res);
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tc = TCG_COND_EQ;
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ext_uns = true;
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break;
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case 3: /* <> */
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return cond_make_0(TCG_COND_NE, res);
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tc = TCG_COND_NE;
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ext_uns = true;
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break;
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case 4: /* < */
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return cond_make_0(TCG_COND_LT, res);
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tc = TCG_COND_LT;
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ext_uns = false;
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break;
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case 5: /* >= */
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return cond_make_0(TCG_COND_GE, res);
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tc = TCG_COND_GE;
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ext_uns = false;
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break;
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case 6: /* <= */
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return cond_make_0(TCG_COND_LE, res);
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tc = TCG_COND_LE;
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ext_uns = false;
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break;
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case 7: /* > */
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return cond_make_0(TCG_COND_GT, res);
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tc = TCG_COND_GT;
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ext_uns = false;
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break;
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case 14: /* OD */
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case 15: /* EV */
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@ -1020,6 +1034,18 @@ static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, TCGv_reg res)
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default:
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g_assert_not_reached();
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}
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if (cond_need_ext(ctx, d)) {
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TCGv_reg tmp = tcg_temp_new();
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if (ext_uns) {
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tcg_gen_ext32u_reg(tmp, res);
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} else {
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tcg_gen_ext32s_reg(tmp, res);
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}
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return cond_make_0_tmp(tc, tmp);
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}
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return cond_make_0(tc, res);
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}
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/* Similar, but for shift/extract/deposit conditions. */
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@ -1027,6 +1053,7 @@ static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, TCGv_reg res)
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static DisasCond do_sed_cond(DisasContext *ctx, unsigned orig, TCGv_reg res)
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{
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unsigned c, f;
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bool d = false;
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/* Convert the compressed condition codes to standard.
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0-2 are the same as logicals (nv,<,<=), while 3 is OD.
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@ -1037,7 +1064,7 @@ static DisasCond do_sed_cond(DisasContext *ctx, unsigned orig, TCGv_reg res)
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}
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f = (orig & 4) / 4;
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return do_log_cond(ctx, c * 2 + f, res);
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return do_log_cond(ctx, c * 2 + f, d, res);
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}
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/* Similar, but for unit conditions. */
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@ -1381,6 +1408,7 @@ static void do_log(DisasContext *ctx, unsigned rt, TCGv_reg in1,
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void (*fn)(TCGv_reg, TCGv_reg, TCGv_reg))
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{
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TCGv_reg dest = dest_gpr(ctx, rt);
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bool d = false;
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/* Perform the operation, and writeback. */
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fn(dest, in1, in2);
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@ -1389,7 +1417,7 @@ static void do_log(DisasContext *ctx, unsigned rt, TCGv_reg in1,
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/* Install the new nullification. */
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cond_free(&ctx->null_cond);
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if (cf) {
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ctx->null_cond = do_log_cond(ctx, cf, dest);
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ctx->null_cond = do_log_cond(ctx, cf, d, dest);
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}
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}
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