mirror of https://github.com/xemu-project/xemu.git
PIC reset fix (initial patch by Hidemi KAWAI)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@836 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -13,6 +13,7 @@ version 0.5.6:
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- NE2K PCI support
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- NE2K PCI support
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- dummy VGA PCI support
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- dummy VGA PCI support
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- VGA font selection fix (Daniel Serpell)
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- VGA font selection fix (Daniel Serpell)
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- PIC reset fix (Hidemi KAWAI)
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version 0.5.5:
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version 0.5.5:
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@ -569,7 +569,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
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#define cpu_init cpu_x86_init
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#define cpu_init cpu_x86_init
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#define cpu_exec cpu_x86_exec
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#define cpu_exec cpu_x86_exec
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#define cpu_gen_code cpu_x86_gen_code
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#define cpu_gen_code cpu_x86_gen_code
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#define cpu_interrupt cpu_x86_interrupt
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#define cpu_signal_handler cpu_x86_signal_handler
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#define cpu_signal_handler cpu_x86_signal_handler
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#define cpu_dump_state cpu_x86_dump_state
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#define cpu_dump_state cpu_x86_dump_state
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@ -579,7 +578,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
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#define cpu_init cpu_arm_init
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#define cpu_init cpu_arm_init
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#define cpu_exec cpu_arm_exec
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#define cpu_exec cpu_arm_exec
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#define cpu_gen_code cpu_arm_gen_code
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#define cpu_gen_code cpu_arm_gen_code
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#define cpu_interrupt cpu_arm_interrupt
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#define cpu_signal_handler cpu_arm_signal_handler
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#define cpu_signal_handler cpu_arm_signal_handler
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#define cpu_dump_state cpu_arm_dump_state
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#define cpu_dump_state cpu_arm_dump_state
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@ -589,7 +587,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
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#define cpu_init cpu_sparc_init
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#define cpu_init cpu_sparc_init
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#define cpu_exec cpu_sparc_exec
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#define cpu_exec cpu_sparc_exec
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#define cpu_gen_code cpu_sparc_gen_code
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#define cpu_gen_code cpu_sparc_gen_code
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#define cpu_interrupt cpu_sparc_interrupt
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#define cpu_signal_handler cpu_sparc_signal_handler
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#define cpu_signal_handler cpu_sparc_signal_handler
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#define cpu_dump_state cpu_sparc_dump_state
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#define cpu_dump_state cpu_sparc_dump_state
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@ -599,7 +596,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
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#define cpu_init cpu_ppc_init
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#define cpu_init cpu_ppc_init
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#define cpu_exec cpu_ppc_exec
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#define cpu_exec cpu_ppc_exec
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#define cpu_gen_code cpu_ppc_gen_code
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#define cpu_gen_code cpu_ppc_gen_code
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#define cpu_interrupt cpu_ppc_interrupt
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#define cpu_signal_handler cpu_ppc_signal_handler
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#define cpu_signal_handler cpu_ppc_signal_handler
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#define cpu_dump_state cpu_ppc_dump_state
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#define cpu_dump_state cpu_ppc_dump_state
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@ -620,6 +616,7 @@ extern int code_copy_enabled;
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#define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */
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#define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */
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#define CPU_INTERRUPT_TIMER 0x08 /* internal timer exception pending */
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#define CPU_INTERRUPT_TIMER 0x08 /* internal timer exception pending */
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void cpu_interrupt(CPUState *s, int mask);
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void cpu_interrupt(CPUState *s, int mask);
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void cpu_reset_interrupt(CPUState *env, int mask);
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int cpu_breakpoint_insert(CPUState *env, target_ulong pc);
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int cpu_breakpoint_insert(CPUState *env, target_ulong pc);
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int cpu_breakpoint_remove(CPUState *env, target_ulong pc);
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int cpu_breakpoint_remove(CPUState *env, target_ulong pc);
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5
exec.c
5
exec.c
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@ -1112,6 +1112,11 @@ void cpu_interrupt(CPUState *env, int mask)
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}
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}
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}
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}
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void cpu_reset_interrupt(CPUState *env, int mask)
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{
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env->interrupt_request &= ~mask;
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}
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CPULogItem cpu_log_items[] = {
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CPULogItem cpu_log_items[] = {
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{ CPU_LOG_TB_OUT_ASM, "out_asm",
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{ CPU_LOG_TB_OUT_ASM, "out_asm",
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"show generated host assembly code for each compiled TB" },
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"show generated host assembly code for each compiled TB" },
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@ -231,6 +231,8 @@ static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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tmp = s->elcr_mask;
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tmp = s->elcr_mask;
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memset(s, 0, sizeof(PicState));
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memset(s, 0, sizeof(PicState));
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s->elcr_mask = tmp;
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s->elcr_mask = tmp;
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/* deassert a pending interrupt */
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cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
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s->init_state = 1;
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s->init_state = 1;
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s->init4 = val & 1;
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s->init4 = val & 1;
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