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target-ppc: Add Altivec register read/write using XML 

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6424 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2009-01-24 15:08:09 +00:00
parent 2495152227
commit b4f8d821e5
1 changed files with 50 additions and 0 deletions
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50
target-ppc/translate_init.c
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@ -9299,6 +9299,52 @@ static int gdb_set_float_reg(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int gdb_get_avr_reg(CPUState *env, uint8_t *mem_buf, int n)
{
if (n < 32) {
#ifdef WORDS_BIGENDIAN
stq_p(mem_buf, env->avr[n].u64[0]);
stq_p(mem_buf+8, env->avr[n].u64[1]);
#else
stq_p(mem_buf, env->avr[n].u64[1]);
stq_p(mem_buf+8, env->avr[n].u64[0]);
#endif
return 16;
}
if (n == 33) {
stl_p(mem_buf, env->vscr);
return 4;
}
if (n == 34) {
stl_p(mem_buf, (uint32_t)env->spr[SPR_VRSAVE]);
return 4;
}
return 0;
}
static int gdb_set_avr_reg(CPUState *env, uint8_t *mem_buf, int n)
{
if (n < 32) {
#ifdef WORDS_BIGENDIAN
env->avr[n].u64[0] = ldq_p(mem_buf);
env->avr[n].u64[1] = ldq_p(mem_buf+8);
#else
env->avr[n].u64[1] = ldq_p(mem_buf);
env->avr[n].u64[0] = ldq_p(mem_buf+8);
#endif
return 16;
}
if (n == 33) {
env->vscr = ldl_p(mem_buf);
return 4;
}
if (n == 34) {
env->spr[SPR_VRSAVE] = (target_ulong)ldl_p(mem_buf);
return 4;
}
return 0;
}
int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def)
{
env->msr_mask = def->msr_mask;
@ -9316,6 +9362,10 @@ int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def)
gdb_register_coprocessor(env, gdb_get_float_reg, gdb_set_float_reg,
33, "power-fpu.xml", 0);
}
if (def->insns_flags & PPC_ALTIVEC) {
gdb_register_coprocessor(env, gdb_get_avr_reg, gdb_set_avr_reg,
34, "power-altivec.xml", 0);
}
#if defined(PPC_DUMP_CPU)
{
const char *mmu_model, *excp_model, *bus_model;