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target/riscv: pmp: Fix some typos 

%s/CSP/CSR
%s/thie/the

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210627115716.3552-1-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Bin Meng 2021-06-27 19:57:16 +08:00 committed by Alistair Francis
parent a9649a719a
commit b4cb178efb
1 changed files with 5 additions and 5 deletions
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10
target/riscv/pmp.c
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@ -456,7 +456,7 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong addr,
} }
/* /*
* Handle a write to a pmpcfg CSP * Handle a write to a pmpcfg CSR
*/ */
void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index, void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index,
target_ulong val) target_ulong val)
@ -483,7 +483,7 @@ void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index,
/* /*
* Handle a read from a pmpcfg CSP * Handle a read from a pmpcfg CSR
*/ */
target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index) target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index)
{ {
@ -502,7 +502,7 @@ target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index)
/* /*
* Handle a write to a pmpaddr CSP * Handle a write to a pmpaddr CSR
*/ */
void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index, void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index,
target_ulong val) target_ulong val)
@ -540,7 +540,7 @@ void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index,
/* /*
* Handle a read from a pmpaddr CSP * Handle a read from a pmpaddr CSR
*/ */
target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index) target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index)
{ {
@ -593,7 +593,7 @@ target_ulong mseccfg_csr_read(CPURISCVState *env)
/* /*
* Calculate the TLB size if the start address or the end address of * Calculate the TLB size if the start address or the end address of
* PMP entry is presented in thie TLB page. * PMP entry is presented in the TLB page.
*/ */
static target_ulong pmp_get_tlb_size(CPURISCVState *env, int pmp_index, static target_ulong pmp_get_tlb_size(CPURISCVState *env, int pmp_index,
target_ulong tlb_sa, target_ulong tlb_ea) target_ulong tlb_sa, target_ulong tlb_ea)