mirror of https://github.com/xemu-project/xemu.git
hw/misc/iotkit-secctl: Add remaining simple registers
Add remaining easy registers to iotkit-secctl: * NSCCFG just routes its two bits out to external GPIO lines * BRGINSTAT/BRGINTCLR/BRGINTEN can be dummies, because QEMU's bus fabric can never report errors Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180220180325.29818-18-peter.maydell@linaro.org
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@ -136,12 +136,24 @@ static MemTxResult iotkit_secctl_s_read(void *opaque, hwaddr addr,
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case A_SECRESPCFG:
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r = s->secrespcfg;
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break;
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case A_NSCCFG:
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r = s->nsccfg;
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break;
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case A_SECPPCINTSTAT:
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r = s->secppcintstat;
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break;
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case A_SECPPCINTEN:
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r = s->secppcinten;
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break;
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case A_BRGINTSTAT:
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/* QEMU's bus fabric can never report errors as it doesn't buffer
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* writes, so we never report bridge interrupts.
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*/
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r = 0;
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break;
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case A_BRGINTEN:
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r = s->brginten;
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break;
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case A_AHBNSPPCEXP0:
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case A_AHBNSPPCEXP1:
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case A_AHBNSPPCEXP2:
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@ -174,12 +186,9 @@ static MemTxResult iotkit_secctl_s_read(void *opaque, hwaddr addr,
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case A_APBSPPPCEXP3:
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r = s->apbexp[offset_to_ppc_idx(offset)].sp;
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break;
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case A_NSCCFG:
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case A_SECMPCINTSTATUS:
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case A_SECMSCINTSTAT:
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case A_SECMSCINTEN:
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case A_BRGINTSTAT:
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case A_BRGINTEN:
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case A_NSMSCEXP:
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qemu_log_mask(LOG_UNIMP,
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"IoTKit SecCtl S block read: "
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@ -298,6 +307,10 @@ static MemTxResult iotkit_secctl_s_write(void *opaque, hwaddr addr,
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}
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switch (offset) {
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case A_NSCCFG:
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s->nsccfg = value & 3;
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qemu_set_irq(s->nsc_cfg_irq, s->nsccfg);
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break;
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case A_SECRESPCFG:
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value &= 1;
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s->secrespcfg = value;
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@ -311,6 +324,11 @@ static MemTxResult iotkit_secctl_s_write(void *opaque, hwaddr addr,
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s->secppcinten = value & 0x00f000f3;
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foreach_ppc(s, iotkit_secctl_ppc_update_irq_enable);
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break;
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case A_BRGINTCLR:
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break;
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case A_BRGINTEN:
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s->brginten = value & 0xffff0000;
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break;
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case A_AHBNSPPCEXP0:
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case A_AHBNSPPCEXP1:
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case A_AHBNSPPCEXP2:
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@ -349,11 +367,8 @@ static MemTxResult iotkit_secctl_s_write(void *opaque, hwaddr addr,
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ppc = &s->apbexp[offset_to_ppc_idx(offset)];
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iotkit_secctl_ppc_sp_write(ppc, value);
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break;
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case A_NSCCFG:
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case A_SECMSCINTCLR:
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case A_SECMSCINTEN:
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case A_BRGINTCLR:
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case A_BRGINTEN:
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qemu_log_mask(LOG_UNIMP,
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"IoTKit SecCtl S block write: "
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"unimplemented offset 0x%x\n", offset);
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@ -551,6 +566,8 @@ static void iotkit_secctl_reset(DeviceState *dev)
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s->secppcintstat = 0;
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s->secppcinten = 0;
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s->secrespcfg = 0;
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s->nsccfg = 0;
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s->brginten = 0;
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foreach_ppc(s, iotkit_secctl_reset_ppc);
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}
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@ -621,6 +638,7 @@ static void iotkit_secctl_init(Object *obj)
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}
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qdev_init_gpio_out_named(dev, &s->sec_resp_cfg, "sec_resp_cfg", 1);
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qdev_init_gpio_out_named(dev, &s->nsc_cfg_irq, "nsc_cfg", 1);
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memory_region_init_io(&s->s_regs, obj, &iotkit_secctl_s_ops,
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s, "iotkit-secctl-s-regs", 0x1000);
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@ -650,6 +668,8 @@ static const VMStateDescription iotkit_secctl_vmstate = {
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VMSTATE_UINT32(secppcintstat, IoTKitSecCtl),
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VMSTATE_UINT32(secppcinten, IoTKitSecCtl),
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VMSTATE_UINT32(secrespcfg, IoTKitSecCtl),
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VMSTATE_UINT32(nsccfg, IoTKitSecCtl),
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VMSTATE_UINT32(brginten, IoTKitSecCtl),
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VMSTATE_STRUCT_ARRAY(apb, IoTKitSecCtl, IOTS_NUM_APB_PPC, 1,
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iotkit_secctl_ppc_vmstate, IoTKitSecCtlPPC),
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VMSTATE_STRUCT_ARRAY(apbexp, IoTKitSecCtl, IOTS_NUM_APB_EXP_PPC, 1,
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@ -18,6 +18,7 @@
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* + sysbus MMIO region 1 is the "non-secure privilege control block" registers
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* + named GPIO output "sec_resp_cfg" indicating whether blocked accesses
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* should RAZ/WI or bus error
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* + named GPIO output "nsc_cfg" whose value tracks the NSCCFG register value
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* Controlling the 2 APB PPCs in the IoTKit:
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* + named GPIO outputs apb_ppc0_nonsec[0..2] and apb_ppc1_nonsec
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* + named GPIO outputs apb_ppc0_ap[0..2] and apb_ppc1_ap
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@ -83,6 +84,7 @@ struct IoTKitSecCtl {
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/*< public >*/
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qemu_irq sec_resp_cfg;
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qemu_irq nsc_cfg_irq;
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MemoryRegion s_regs;
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MemoryRegion ns_regs;
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@ -90,6 +92,8 @@ struct IoTKitSecCtl {
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uint32_t secppcintstat;
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uint32_t secppcinten;
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uint32_t secrespcfg;
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uint32_t nsccfg;
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uint32_t brginten;
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IoTKitSecCtlPPC apb[IOTS_NUM_APB_PPC];
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IoTKitSecCtlPPC apbexp[IOTS_NUM_APB_EXP_PPC];
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