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target/arm: Diagnose base == pc for LDM/STM 

We have been using store_reg and not store_reg_for_load when writing
back a loaded value into the base register.  At first glance this is
incorrect when base == pc, however that case is UNPREDICTABLE.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190904193059.26202-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2019-09-04 12:30:21 -07:00 committed by Peter Maydell
parent 4b222545db
commit b0e382b8cf
1 changed files with 3 additions and 2 deletions
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5
target/arm/translate.c
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@ -9863,7 +9863,7 @@ static bool op_stm(DisasContext *s, arg_ldst_block *a, int min_n)
list = a->list; list = a->list;
n = ctpop16(list); n = ctpop16(list);
if (n < min_n) { if (n < min_n || a->rn == 15) {
unallocated_encoding(s); unallocated_encoding(s);
return true; return true;
} }
@ -9943,7 +9943,7 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a, int min_n)
list = a->list; list = a->list;
n = ctpop16(list); n = ctpop16(list);
if (n < min_n) { if (n < min_n || a->rn == 15) {
unallocated_encoding(s); unallocated_encoding(s);
return true; return true;
} }
@ -9983,6 +9983,7 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a, int min_n)
op_addr_block_post(s, a, addr, n); op_addr_block_post(s, a, addr, n);
if (loaded_base) { if (loaded_base) {
/* Note that we reject base == pc above. */
store_reg(s, a->rn, loaded_var); store_reg(s, a->rn, loaded_var);
} }