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pci, pc, virtio fixes and cleanups 

A bunch of fixes all over the place.  Also, beginning to generalize acpi build
 code for reuse by ARM.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

pci, pc, virtio fixes and cleanups

A bunch of fixes all over the place.  Also, beginning to generalize acpi build
code for reuse by ARM.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Tue 27 Jan 2015 13:12:25 GMT using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"

* remotes/mst/tags/for_upstream:
  pc-dimm: Add Error argument to pc_existing_dimms_capacity
  pc-dimm: Make pc_existing_dimms_capacity global
  pc: Fix DIMMs capacity calculation
  smbios: Don't report unknown CPU speed (fix SVVP regression)
  smbios: Fix dimm size calculation when RAM is multiple of 16GB
  bios-linker-loader: move source to common location
  bios-linker-loader: move header to common location
  virtio: fix feature bit checks
  bios-tables-test: split piix4 and q35 tests
  acpi: build_append_nameseg(): add padding if necessary
  acpi: update generated hex files
  acpi-test: update expected DSDT
  pc: acpi: fix WindowsXP BSOD when memory hotplug is enabled
  pci: Split pcie_host_mmcfg_map()
  Add some trace calls to pci.c.
  ich9: add disable_s3, disable_s4, s4_val properties

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2015-01-27 13:17:30 +00:00
parent 7baef63073 3715345043
commit b00c92e3ef
24 changed files with 268 additions and 69 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
hw/acpi/Makefile.objs
View File

@ -1,3 +1,4 @@
common-obj-$(CONFIG_ACPI) += core.o piix4.o ich9.o pcihp.o cpu_hotplug.o
common-obj-$(CONFIG_ACPI) += memory_hotplug.o
common-obj-$(CONFIG_ACPI) += acpi_interface.o
common-obj-$(CONFIG_ACPI) += bios-linker-loader.o

2
hw/i386/bios-linker-loader.c → hw/acpi/bios-linker-loader.c
View File

@ -19,7 +19,7 @@
*/
#include "qemu-common.h"
#include "bios-linker-loader.h"
#include "hw/acpi/bios-linker-loader.h"
#include "hw/nvram/fw_cfg.h"
#include "qemu/bswap.h"

98
hw/acpi/ich9.c
View File

@ -219,7 +219,7 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, 2);
acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->s4_val);
acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
@ -269,10 +269,94 @@ static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value,
s->pm.acpi_memory_hotplug.is_enabled = value;
}
static void ich9_pm_get_disable_s3(Object *obj, Visitor *v,
void *opaque, const char *name,
Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
uint8_t value = pm->disable_s3;
visit_type_uint8(v, &value, name, errp);
}
static void ich9_pm_set_disable_s3(Object *obj, Visitor *v,
void *opaque, const char *name,
Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
Error *local_err = NULL;
uint8_t value;
visit_type_uint8(v, &value, name, &local_err);
if (local_err) {
goto out;
}
pm->disable_s3 = value;
out:
error_propagate(errp, local_err);
}
static void ich9_pm_get_disable_s4(Object *obj, Visitor *v,
void *opaque, const char *name,
Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
uint8_t value = pm->disable_s4;
visit_type_uint8(v, &value, name, errp);
}
static void ich9_pm_set_disable_s4(Object *obj, Visitor *v,
void *opaque, const char *name,
Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
Error *local_err = NULL;
uint8_t value;
visit_type_uint8(v, &value, name, &local_err);
if (local_err) {
goto out;
}
pm->disable_s4 = value;
out:
error_propagate(errp, local_err);
}
static void ich9_pm_get_s4_val(Object *obj, Visitor *v,
void *opaque, const char *name,
Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
uint8_t value = pm->s4_val;
visit_type_uint8(v, &value, name, errp);
}
static void ich9_pm_set_s4_val(Object *obj, Visitor *v,
void *opaque, const char *name,
Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
Error *local_err = NULL;
uint8_t value;
visit_type_uint8(v, &value, name, &local_err);
if (local_err) {
goto out;
}
pm->s4_val = value;
out:
error_propagate(errp, local_err);
}
void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp)
{
static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
pm->acpi_memory_hotplug.is_enabled = true;
pm->disable_s3 = 0;
pm->disable_s4 = 0;
pm->s4_val = 2;
object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
&pm->pm_io_base, errp);
@ -285,6 +369,18 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp)
ich9_pm_get_memory_hotplug_support,
ich9_pm_set_memory_hotplug_support,
NULL);
object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8",
ich9_pm_get_disable_s3,
ich9_pm_set_disable_s3,
NULL, pm, NULL);
object_property_add(obj, ACPI_PM_PROP_S4_DISABLED, "uint8",
ich9_pm_get_disable_s4,
ich9_pm_set_disable_s4,
NULL, pm, NULL);
object_property_add(obj, ACPI_PM_PROP_S4_VAL, "uint8",
ich9_pm_get_s4_val,
ich9_pm_set_s4_val,
NULL, pm, NULL);
}
void ich9_pm_device_plug_cb(ICH9LPCPMRegs *pm, DeviceState *dev, Error **errp)

1
hw/i386/Makefile.objs
View File

@ -7,7 +7,6 @@ obj-$(CONFIG_XEN) += ../xenpv/ xen/
obj-y += kvmvapic.o
obj-y += acpi-build.o
obj-y += bios-linker-loader.o
hw/i386/acpi-build.o: hw/i386/acpi-build.c hw/i386/acpi-dsdt.hex \
hw/i386/ssdt-proc.hex hw/i386/ssdt-pcihp.hex hw/i386/ssdt-misc.hex \
hw/i386/acpi-dsdt.hex hw/i386/q35-acpi-dsdt.hex \

17
hw/i386/acpi-build.c
View File

@ -36,7 +36,7 @@
#include "hw/i386/acpi-defs.h"
#include "hw/acpi/acpi.h"
#include "hw/nvram/fw_cfg.h"
#include "bios-linker-loader.h"
#include "hw/acpi/bios-linker-loader.h"
#include "hw/loader.h"
#include "hw/isa/isa.h"
#include "hw/acpi/memory_hotplug.h"
@ -305,6 +305,8 @@ static inline void build_append_array(GArray *array, GArray *val)
g_array_append_vals(array, val->data, val->len);
}
#define ACPI_NAMESEG_LEN 4
static void GCC_FMT_ATTR(2, 3)
build_append_nameseg(GArray *array, const char *format, ...)
{
@ -317,8 +319,11 @@ build_append_nameseg(GArray *array, const char *format, ...)
len = vsnprintf(s, sizeof s, format, args);
va_end(args);
assert(len == 4);
assert(len <= ACPI_NAMESEG_LEN);
g_array_append_vals(array, s, len);
/* Pad up to ACPI_NAMESEG_LEN characters if necessary. */
g_array_append_vals(array, "____", ACPI_NAMESEG_LEN - len);
}
/* 5.4 Definition Block Encoding */
@ -859,7 +864,7 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state)
if (bus->parent_dev) {
op = 0x82; /* DeviceOp */
build_append_nameseg(bus_table, "S%.02X_",
build_append_nameseg(bus_table, "S%.02X",
bus->parent_dev->devfn);
build_append_byte(bus_table, 0x08); /* NameOp */
build_append_nameseg(bus_table, "_SUN");
@ -979,7 +984,7 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state)
build_append_int(notify, 0x1U << i);
build_append_byte(notify, 0x00); /* NullName */
build_append_byte(notify, 0x86); /* NotifyOp */
build_append_nameseg(notify, "S%.02X_", PCI_DEVFN(i, 0));
build_append_nameseg(notify, "S%.02X", PCI_DEVFN(i, 0));
build_append_byte(notify, 0x69); /* Arg1Op */
/* Pack it up */
@ -1036,7 +1041,7 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state)
if (bus->parent_dev) {
build_append_byte(parent->notify_table, '^'); /* ParentPrefixChar */
build_append_byte(parent->notify_table, 0x2E); /* DualNamePrefix */
build_append_nameseg(parent->notify_table, "S%.02X_",
build_append_nameseg(parent->notify_table, "S%.02X",
bus->parent_dev->devfn);
build_append_nameseg(parent->notify_table, "PCNT");
}
@ -1106,7 +1111,7 @@ build_ssdt(GArray *table_data, GArray *linker,
GArray *sb_scope = build_alloc_array();
uint8_t op = 0x10; /* ScopeOp */
build_append_nameseg(sb_scope, "_SB_");
build_append_nameseg(sb_scope, "_SB");
/* build Processor object for each processor */
for (i = 0; i < acpi_cpus; i++) {

1
hw/i386/acpi-dsdt-cpu-hotplug.dsl
View File

@ -94,6 +94,7 @@ Scope(\_SB) {
Device(CPU_HOTPLUG_RESOURCE_DEVICE) {
Name(_HID, EisaId("PNP0A06"))
Name(_UID, "CPU hotplug resources")
Name(_CRS, ResourceTemplate() {
IO(Decode16, CPU_STATUS_BASE, CPU_STATUS_BASE, 0, CPU_STATUS_LEN)

43
hw/i386/acpi-dsdt.hex.generated
View File

@ -3,12 +3,12 @@ static unsigned char AcpiDsdtAmlCode[] = {
0x53,
0x44,
0x54,
0x8,
0x25,
0xe,
0x0,
0x0,
0x1,
0xfc,
0x6c,
0x42,
0x58,
0x50,
@ -31,8 +31,8 @@ static unsigned char AcpiDsdtAmlCode[] = {
0x4e,
0x54,
0x4c,
0x28,
0x8,
0x7,
0x11,
0x14,
0x20,
0x10,
@ -2318,8 +2318,8 @@ static unsigned char AcpiDsdtAmlCode[] = {
0x53,
0x1,
0x10,
0x42,
0x11,
0x4f,
0x12,
0x5f,
0x53,
0x42,
@ -2551,7 +2551,8 @@ static unsigned char AcpiDsdtAmlCode[] = {
0x60,
0x5b,
0x82,
0x29,
0x46,
0x4,
0x50,
0x52,
0x45,
@ -2568,6 +2569,34 @@ static unsigned char AcpiDsdtAmlCode[] = {
0x6,
0x8,
0x5f,
0x55,
0x49,
0x44,
0xd,
0x43,
0x50,
0x55,
0x20,
0x68,
0x6f,
0x74,
0x70,
0x6c,
0x75,
0x67,
0x20,
0x72,
0x65,
0x73,
0x6f,
0x75,
0x72,
0x63,
0x65,
0x73,
0x0,
0x8,
0x5f,
0x43,
0x52,
0x53,

40
hw/i386/pc.c
View File

@ -1552,37 +1552,6 @@ void qemu_register_pc_machine(QEMUMachine *m)
g_free(name);
}
static int pc_dimm_count(Object *obj, void *opaque)
{
int *count = opaque;
if (object_dynamic_cast(obj, TYPE_PC_DIMM)) {
(*count)++;
}
object_child_foreach(obj, pc_dimm_count, opaque);
return 0;
}
static int pc_existing_dimms_capacity(Object *obj, void *opaque)
{
Error *local_err = NULL;
uint64_t *size = opaque;
if (object_dynamic_cast(obj, TYPE_PC_DIMM)) {
(*size) += object_property_get_int(obj, PC_DIMM_SIZE_PROP, &local_err);
if (local_err) {
qerror_report_err(local_err);
error_free(local_err);
return 1;
}
}
object_child_foreach(obj, pc_dimm_count, opaque);
return 0;
}
static void pc_dimm_plug(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp)
{
@ -1615,16 +1584,17 @@ static void pc_dimm_plug(HotplugHandler *hotplug_dev,
goto out;
}
if (pc_existing_dimms_capacity(OBJECT(machine), &existing_dimms_capacity)) {
error_setg(&local_err, "failed to get total size of existing DIMMs");
existing_dimms_capacity = pc_existing_dimms_capacity(&local_err);
if (local_err) {
goto out;
}
if (existing_dimms_capacity + memory_region_size(mr) >
machine->maxram_size - machine->ram_size) {
error_setg(&local_err, "not enough space, currently 0x%" PRIx64
" in use of total 0x" RAM_ADDR_FMT,
existing_dimms_capacity, machine->maxram_size);
" in use of total hot pluggable 0x" RAM_ADDR_FMT,
existing_dimms_capacity,
machine->maxram_size - machine->ram_size);
goto out;
}

45
hw/i386/q35-acpi-dsdt.hex.generated
View File

@ -3,12 +3,12 @@ static unsigned char Q35AcpiDsdtAmlCode[] = {
0x53,
0x44,
0x54,
0xf6,
0x1f,
0x13,
0x20,
0x0,
0x0,
0x1,
0x91,
0x0,
0x42,
0x58,
0x50,
@ -31,8 +31,8 @@ static unsigned char Q35AcpiDsdtAmlCode[] = {
0x4e,
0x54,
0x4c,
0x28,
0x8,
0x7,
0x11,
0x14,
0x20,
0x10,
@ -6959,8 +6959,8 @@ static unsigned char Q35AcpiDsdtAmlCode[] = {
0x53,
0x1,
0x10,
0x42,
0x11,
0x4f,
0x12,
0x5f,
0x53,
0x42,
@ -7192,7 +7192,8 @@ static unsigned char Q35AcpiDsdtAmlCode[] = {
0x60,
0x5b,
0x82,
0x29,
0x46,
0x4,
0x50,
0x52,
0x45,
@ -7209,6 +7210,34 @@ static unsigned char Q35AcpiDsdtAmlCode[] = {
0x6,
0x8,
0x5f,
0x55,
0x49,
0x44,
0xd,
0x43,
0x50,
0x55,
0x20,
0x68,
0x6f,
0x74,
0x70,
0x6c,
0x75,
0x67,
0x20,
0x72,
0x65,
0x73,
0x6f,
0x75,
0x72,
0x63,
0x65,
0x73,
0x0,
0x8,
0x5f,
0x43,
0x52,
0x53,

8
hw/i386/smbios.c
View File

@ -618,8 +618,9 @@ static void smbios_build_type_4_table(unsigned instance)
SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version);
t->voltage = 0;
t->external_clock = cpu_to_le16(0); /* Unknown */
t->max_speed = cpu_to_le16(0); /* Unknown */
t->current_speed = cpu_to_le16(0); /* Unknown */
/* SVVP requires max_speed and current_speed to not be unknown. */
t->max_speed = cpu_to_le16(2000); /* 2000 MHz */
t->current_speed = cpu_to_le16(2000); /* 2000 MHz */
t->status = 0x41; /* Socket populated, CPU enabled */
t->processor_upgrade = 0x01; /* Other */
t->l1_cache_handle = cpu_to_le16(0xFFFF); /* N/A */
@ -850,7 +851,8 @@ void smbios_get_tables(uint8_t **tables, size_t *tables_len,
}
#define MAX_DIMM_SZ (16ll * ONE_GB)
#define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ : ram_size % MAX_DIMM_SZ)
#define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \
: ((ram_size - 1) % MAX_DIMM_SZ) + 1)
dimm_cnt = QEMU_ALIGN_UP(ram_size, MAX_DIMM_SZ) / MAX_DIMM_SZ;

37
hw/mem/pc-dimm.c
View File

@ -23,6 +23,43 @@
#include "qapi/visitor.h"
#include "qemu/range.h"
typedef struct pc_dimms_capacity {
uint64_t size;
Error **errp;
} pc_dimms_capacity;
static int pc_existing_dimms_capacity_internal(Object *obj, void *opaque)
{
pc_dimms_capacity *cap = opaque;
uint64_t *size = &cap->size;
if (object_dynamic_cast(obj, TYPE_PC_DIMM)) {
DeviceState *dev = DEVICE(obj);
if (dev->realized) {
(*size) += object_property_get_int(obj, PC_DIMM_SIZE_PROP,
cap->errp);
}
if (cap->errp && *cap->errp) {
return 1;
}
}
object_child_foreach(obj, pc_existing_dimms_capacity_internal, opaque);
return 0;
}
uint64_t pc_existing_dimms_capacity(Error **errp)
{
pc_dimms_capacity cap;
cap.size = 0;
cap.errp = errp;
pc_existing_dimms_capacity_internal(qdev_get_machine(), &cap);
return cap.size;
}
int qmp_pc_dimm_device_list(Object *obj, void *opaque)
{
MemoryDeviceInfoList ***prev = opaque;

9
hw/pci/pci.c
View File

@ -32,6 +32,7 @@
#include "hw/loader.h"
#include "qemu/range.h"
#include "qmp-commands.h"
#include "trace.h"
#include "hw/pci/msi.h"
#include "hw/pci/msix.h"
#include "exec/address-spaces.h"
@ -1106,10 +1107,18 @@ static void pci_update_mappings(PCIDevice *d)
/* now do the real mapping */
if (r->addr != PCI_BAR_UNMAPPED) {
trace_pci_update_mappings_del(d, pci_bus_num(d->bus),
PCI_FUNC(d->devfn),
PCI_SLOT(d->devfn),
i, r->addr, r->size);
memory_region_del_subregion(r->address_space, r->memory);
}
r->addr = new_addr;
if (r->addr != PCI_BAR_UNMAPPED) {
trace_pci_update_mappings_add(d, pci_bus_num(d->bus),
PCI_FUNC(d->devfn),
PCI_SLOT(d->devfn),
i, r->addr, r->size);
memory_region_add_subregion_overlap(r->address_space,
r->addr, r->memory, 1);
}

9
hw/pci/pcie_host.c
View File

@ -98,8 +98,7 @@ void pcie_host_mmcfg_unmap(PCIExpressHost *e)
}
}
void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr,
uint32_t size)
void pcie_host_mmcfg_init(PCIExpressHost *e, uint32_t size)
{
assert(!(size & (size - 1))); /* power of 2 */
assert(size >= PCIE_MMCFG_SIZE_MIN);
@ -107,6 +106,12 @@ void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr,
e->size = size;
memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e,
"pcie-mmcfg", e->size);
}
void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr,
uint32_t size)
{
pcie_host_mmcfg_init(e, size);
e->base_addr = addr;
memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio);
}

2
hw/scsi/virtio-scsi.c
View File

@ -144,7 +144,7 @@ static int virtio_scsi_parse_req(VirtIOSCSIReq *req,
*
* TODO: always disable this workaround for virtio 1.0 devices.
*/
if ((vdev->guest_features & VIRTIO_F_ANY_LAYOUT) == 0) {
if ((vdev->guest_features & (1 << VIRTIO_F_ANY_LAYOUT)) == 0) {
req_size = req->elem.out_sg[0].iov_len;
resp_size = req->elem.in_sg[0].iov_len;
}

4
hw/virtio/dataplane/vring.c
View File

@ -133,12 +133,12 @@ bool vring_should_notify(VirtIODevice *vdev, Vring *vring)
* interrupts. */
smp_mb();
if ((vdev->guest_features & VIRTIO_F_NOTIFY_ON_EMPTY) &&
if ((vdev->guest_features & (1 << VIRTIO_F_NOTIFY_ON_EMPTY)) &&
unlikely(vring->vr.avail->idx == vring->last_avail_idx)) {
return true;
}
if (!(vdev->guest_features & VIRTIO_RING_F_EVENT_IDX)) {
if (!(vdev->guest_features & (1 << VIRTIO_RING_F_EVENT_IDX))) {
return !(vring->vr.avail->flags & VRING_AVAIL_F_NO_INTERRUPT);
}
old = vring->signalled_used;

0
hw/i386/bios-linker-loader.h → include/hw/acpi/bios-linker-loader.h
View File

4
include/hw/acpi/ich9.h
View File

@ -49,6 +49,10 @@ typedef struct ICH9LPCPMRegs {
AcpiCpuHotplug gpe_cpu;
MemHotplugState acpi_memory_hotplug;
uint8_t disable_s3;
uint8_t disable_s4;
uint8_t s4_val;
} ICH9LPCPMRegs;
void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,

1
include/hw/mem/pc-dimm.h
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@ -78,4 +78,5 @@ uint64_t pc_dimm_get_free_addr(uint64_t address_space_start,
int pc_dimm_get_free_slot(const int *hint, int max_slots, Error **errp);
int qmp_pc_dimm_device_list(Object *obj, void *opaque);
uint64_t pc_existing_dimms_capacity(Error **errp);
#endif

1
include/hw/pci/pcie_host.h
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@ -50,6 +50,7 @@ struct PCIExpressHost {
};
void pcie_host_mmcfg_unmap(PCIExpressHost *e);
void pcie_host_mmcfg_init(PCIExpressHost *e, uint32_t size);
void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr, uint32_t size);
void pcie_host_mmcfg_update(PCIExpressHost *e,
int enable,

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tests/acpi-test-data/pc/DSDT
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tests/acpi-test-data/q35/DSDT
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tests/acpi-test-data/q35/SSDT
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10
tests/bios-tables-test.c
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@ -765,7 +765,7 @@ static void test_acpi_one(const char *params, test_data *data)
g_free(args);
}
static void test_acpi_tcg(void)
static void test_acpi_piix4_tcg(void)
{
test_data data;
@ -776,6 +776,11 @@ static void test_acpi_tcg(void)
data.machine = MACHINE_PC;
test_acpi_one("-machine accel=tcg", &data);
free_test_data(&data);
}
static void test_acpi_q35_tcg(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_Q35;
@ -799,7 +804,8 @@ int main(int argc, char *argv[])
g_test_init(&argc, &argv, NULL);
if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) {
qtest_add_func("acpi/tcg", test_acpi_tcg);
qtest_add_func("acpi/piix4/tcg", test_acpi_piix4_tcg);
qtest_add_func("acpi/q35/tcg", test_acpi_q35_tcg);
}
ret = g_test_run();
unlink(disk);

4
trace-events
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@ -1247,6 +1247,10 @@ spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=
spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at %x asked %u, have only %u"
# hw/pci/pci.c
pci_update_mappings_del(void *d, uint32_t bus, uint32_t func, uint32_t slot, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
pci_update_mappings_add(void *d, uint32_t bus, uint32_t func, uint32_t slot, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
# hw/intc/xics.c
xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x"
xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32