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hw/char: Remove omap2_uart 

Remove the OMAP2 specific code from omap_uart.c.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240903160751.4100218-40-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2024-09-03 17:07:37 +01:00
parent df7768f5a5
commit aeaf7bb5aa
2 changed files with 0 additions and 118 deletions
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113
hw/char/omap_uart.c
View File

@ -28,7 +28,6 @@ struct omap_uart_s {
MemoryRegion iomem;
hwaddr base;
SerialMM *serial; /* TODO */
struct omap_target_agent_s *ta;
omap_clk fclk;
qemu_irq irq;
@ -36,8 +35,6 @@ struct omap_uart_s {
uint8_t syscontrol;
uint8_t wkup;
uint8_t cfps;
uint8_t mdr[2];
uint8_t scr;
uint8_t clksel;
};
@ -66,113 +63,3 @@ struct omap_uart_s *omap_uart_init(hwaddr base,
DEVICE_NATIVE_ENDIAN);
return s;
}
static uint64_t omap_uart_read(void *opaque, hwaddr addr, unsigned size)
{
struct omap_uart_s *s = opaque;
if (size == 4) {
return omap_badwidth_read8(opaque, addr);
}
switch (addr) {
case 0x20: /* MDR1 */
return s->mdr[0];
case 0x24: /* MDR2 */
return s->mdr[1];
case 0x40: /* SCR */
return s->scr;
case 0x44: /* SSR */
return 0x0;
case 0x48: /* EBLR (OMAP2) */
return s->eblr;
case 0x4C: /* OSC_12M_SEL (OMAP1) */
return s->clksel;
case 0x50: /* MVR */
return 0x30;
case 0x54: /* SYSC (OMAP2) */
return s->syscontrol;
case 0x58: /* SYSS (OMAP2) */
return 1;
case 0x5c: /* WER (OMAP2) */
return s->wkup;
case 0x60: /* CFPS (OMAP2) */
return s->cfps;
}
OMAP_BAD_REG(addr);
return 0;
}
static void omap_uart_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
struct omap_uart_s *s = opaque;
if (size == 4) {
omap_badwidth_write8(opaque, addr, value);
return;
}
switch (addr) {
case 0x20: /* MDR1 */
s->mdr[0] = value & 0x7f;
break;
case 0x24: /* MDR2 */
s->mdr[1] = value & 0xff;
break;
case 0x40: /* SCR */
s->scr = value & 0xff;
break;
case 0x48: /* EBLR (OMAP2) */
s->eblr = value & 0xff;
break;
case 0x4C: /* OSC_12M_SEL (OMAP1) */
s->clksel = value & 1;
break;
case 0x44: /* SSR */
case 0x50: /* MVR */
case 0x58: /* SYSS (OMAP2) */
OMAP_RO_REG(addr);
break;
case 0x54: /* SYSC (OMAP2) */
s->syscontrol = value & 0x1d;
if (value & 2) {
omap_uart_reset(s);
}
break;
case 0x5c: /* WER (OMAP2) */
s->wkup = value & 0x7f;
break;
case 0x60: /* CFPS (OMAP2) */
s->cfps = value & 0xff;
break;
default:
OMAP_BAD_REG(addr);
}
}
static const MemoryRegionOps omap_uart_ops = {
.read = omap_uart_read,
.write = omap_uart_write,
.endianness = DEVICE_NATIVE_ENDIAN,
};
struct omap_uart_s *omap2_uart_init(MemoryRegion *sysmem,
struct omap_target_agent_s *ta,
qemu_irq irq, omap_clk fclk, omap_clk iclk,
qemu_irq txdma, qemu_irq rxdma,
const char *label, Chardev *chr)
{
hwaddr base = omap_l4_attach(ta, 0, NULL);
struct omap_uart_s *s = omap_uart_init(base, irq,
fclk, iclk, txdma, rxdma, label, chr);
memory_region_init_io(&s->iomem, NULL, &omap_uart_ops, s, "omap.uart", 0x100);
s->ta = ta;
memory_region_add_subregion(sysmem, base + 0x20, &s->iomem);
return s;
}

5
include/hw/arm/omap.h
View File

@ -709,11 +709,6 @@ struct omap_uart_s *omap_uart_init(hwaddr base,
qemu_irq irq, omap_clk fclk, omap_clk iclk,
qemu_irq txdma, qemu_irq rxdma,
const char *label, Chardev *chr);
struct omap_uart_s *omap2_uart_init(MemoryRegion *sysmem,
struct omap_target_agent_s *ta,
qemu_irq irq, omap_clk fclk, omap_clk iclk,
qemu_irq txdma, qemu_irq rxdma,
const char *label, Chardev *chr);
void omap_uart_reset(struct omap_uart_s *s);
struct omap_mpuio_s;