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target/i386: Added DR6 and DR7 consistency checks 

DR6[63:32] and DR7[63:32] are reserved and need to be zero.
(AMD64 Architecture Programmer's Manual, V2, 15.5)

Signed-off-by: Lara Lazier <laramglazier@gmail.com>
Message-Id: <20210705081802.18960-3-laramglazier@gmail.com>
[Ignore for 32-bit builds. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Lara Lazier 2021-07-05 10:18:00 +02:00 committed by Paolo Bonzini
parent 481077b28b
commit acf23ffb58
2 changed files with 10 additions and 1 deletions
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2
target/i386/svm.h
View File

@ -140,6 +140,8 @@
#define SVM_MSRPM_SIZE (1ULL << 13) #define SVM_MSRPM_SIZE (1ULL << 13)
#define SVM_IOPM_SIZE ((1ULL << 13) + 1) #define SVM_IOPM_SIZE ((1ULL << 13) + 1)
#define SVM_DR_RESERVED_MASK 0xffffffff00000000ULL
struct QEMU_PACKED vmcb_control_area { struct QEMU_PACKED vmcb_control_area {
uint16_t intercept_cr_read; uint16_t intercept_cr_read;
uint16_t intercept_cr_write; uint16_t intercept_cr_write;

9
target/i386/tcg/sysemu/svm_helper.c
View File

@ -269,7 +269,14 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
env->dr[6] = x86_ldq_phys(cs, env->dr[6] = x86_ldq_phys(cs,
env->vm_vmcb + offsetof(struct vmcb, save.dr6)); env->vm_vmcb + offsetof(struct vmcb, save.dr6));
/* FIXME: guest state consistency checks */ #ifdef TARGET_X86_64
if (env->dr[6] & SVM_DR_RESERVED_MASK) {
cpu_vmexit(env, SVM_EXIT_ERR, 0, GETPC());
}
if (env->dr[7] & SVM_DR_RESERVED_MASK) {
cpu_vmexit(env, SVM_EXIT_ERR, 0, GETPC());
}
#endif
switch (x86_ldub_phys(cs, switch (x86_ldub_phys(cs,
env->vm_vmcb + offsetof(struct vmcb, control.tlb_ctl))) { env->vm_vmcb + offsetof(struct vmcb, control.tlb_ctl))) {