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target/mips/tx79: Introduce PEXTL[BHW] opcodes (Parallel Extend Lower)
Introduce the 'Parallel Extend Lower' opcodes: - PEXTLB (Parallel Extend Upper from Byte) - PEXTLH (Parallel Extend Upper from Halfword) - PEXTLW (Parallel Extend Upper from Word) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210309145653.743937-13-f4bug@amsat.org>
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@ -34,6 +34,9 @@ MTLO1 011100 ..... 0000000000 00000 010011 @rs
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PSUBW 011100 ..... ..... ..... 00001 001000 @rs_rt_rd
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PSUBH 011100 ..... ..... ..... 00101 001000 @rs_rt_rd
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PSUBB 011100 ..... ..... ..... 01001 001000 @rs_rt_rd
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PEXTLW 011100 ..... ..... ..... 10010 001000 @rs_rt_rd
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PEXTLH 011100 ..... ..... ..... 10110 001000 @rs_rt_rd
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PEXTLB 011100 ..... ..... ..... 11010 001000 @rs_rt_rd
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# MMI1
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@ -297,6 +297,81 @@ static void gen_pextw(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 a, TCGv_i64 b)
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tcg_gen_deposit_i64(dh, a, b, 0, 32);
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}
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static bool trans_PEXTLx(DisasContext *ctx, arg_rtype *a, unsigned wlen)
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{
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TCGv_i64 ax, bx;
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if (a->rd == 0) {
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/* nop */
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return true;
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}
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ax = tcg_temp_new_i64();
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bx = tcg_temp_new_i64();
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gen_load_gpr(ax, a->rs);
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gen_load_gpr(bx, a->rt);
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/* Lower half */
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for (int i = 0; i < 64 / (2 * wlen); i++) {
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tcg_gen_deposit_i64(cpu_gpr[a->rd],
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cpu_gpr[a->rd], bx, 2 * wlen * i, wlen);
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tcg_gen_deposit_i64(cpu_gpr[a->rd],
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cpu_gpr[a->rd], ax, 2 * wlen * i + wlen, wlen);
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tcg_gen_shri_i64(bx, bx, wlen);
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tcg_gen_shri_i64(ax, ax, wlen);
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}
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/* Upper half */
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for (int i = 0; i < 64 / (2 * wlen); i++) {
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tcg_gen_deposit_i64(cpu_gpr_hi[a->rd],
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cpu_gpr_hi[a->rd], bx, 2 * wlen * i, wlen);
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tcg_gen_deposit_i64(cpu_gpr_hi[a->rd],
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cpu_gpr_hi[a->rd], ax, 2 * wlen * i + wlen, wlen);
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tcg_gen_shri_i64(bx, bx, wlen);
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tcg_gen_shri_i64(ax, ax, wlen);
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}
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tcg_temp_free(bx);
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tcg_temp_free(ax);
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return true;
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}
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/* Parallel Extend Lower from Byte */
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static bool trans_PEXTLB(DisasContext *ctx, arg_rtype *a)
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{
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return trans_PEXTLx(ctx, a, 8);
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}
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/* Parallel Extend Lower from Halfword */
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static bool trans_PEXTLH(DisasContext *ctx, arg_rtype *a)
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{
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return trans_PEXTLx(ctx, a, 16);
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}
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/* Parallel Extend Lower from Word */
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static bool trans_PEXTLW(DisasContext *ctx, arg_rtype *a)
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{
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TCGv_i64 ax, bx;
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if (a->rd == 0) {
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/* nop */
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return true;
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}
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ax = tcg_temp_new_i64();
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bx = tcg_temp_new_i64();
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gen_load_gpr(ax, a->rs);
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gen_load_gpr(bx, a->rt);
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gen_pextw(cpu_gpr[a->rd], cpu_gpr_hi[a->rd], ax, bx);
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tcg_temp_free(bx);
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tcg_temp_free(ax);
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return true;
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}
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/* Parallel Extend Upper from Word */
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static bool trans_PEXTUW(DisasContext *ctx, arg_rtype *a)
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{
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