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target/i386: Reduce DisasContext.vex_[lv] to uint8_t 

Currently, vex_l is either {0,1}; if in the future we implement
AVX-512, the max value will be 2.  In vex_v we store a register
number.  This is 0-15 for SSE, and 0-31 for AVX-512.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210514151342.384376-24-richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-05-14 10:13:15 -05:00
parent a8b9b657a0
commit a77ca425d7
1 changed files with 2 additions and 2 deletions
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4
target/i386/tcg/translate.c
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@ -97,8 +97,8 @@ typedef struct DisasContext {
uint8_t rex_b;
bool rex_w;
#endif
int vex_l; /* vex vector length */
int vex_v; /* vex vvvv register, without 1's complement. */
uint8_t vex_l; /* vex vector length */
uint8_t vex_v; /* vex vvvv register, without 1's complement. */
CCOp cc_op; /* current CC operation */
bool cc_op_dirty;
int tf; /* TF cpu flag */