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Fix MIPS64 address computation specialcase, by Aurelien Jarno. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2793 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-05-09 09:33:33 +00:00
parent 204a1b8d5e
commit a6763a5881
2 changed files with 18 additions and 2 deletions
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16
target-mips/op.c
View File

@ -289,6 +289,22 @@ void op_store_LO (void)
#undef MEMSUFFIX #undef MEMSUFFIX
#endif #endif
/* Addresses computation */
void op_addr_add (void)
{
/* For compatibility with 32-bit code, data reference in user mode
with Status_UX = 0 should be casted to 32-bit and sign extended.
See the MIPS64 PRA manual, section 4.10. */
#ifdef TARGET_MIPS64
if ((env->CP0_Status & (1 << CP0St_UM)) &&
!(env->CP0_Status & (1 << CP0St_UX)))
T0 = (int64_t)(int32_t)(T0 + T1);
else
#endif
T0 += T1;
RETURN();
}
/* Arithmetic */ /* Arithmetic */
void op_add (void) void op_add (void)
{ {

4
target-mips/translate.c
View File

@ -719,7 +719,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt,
} else { } else {
gen_op_load_gpr_T0(base); gen_op_load_gpr_T0(base);
gen_op_set_T1(offset); gen_op_set_T1(offset);
gen_op_add(); gen_op_addr_add();
} }
/* Don't do NOP if destination is zero: we must perform the actual /* Don't do NOP if destination is zero: we must perform the actual
* memory access * memory access
@ -868,7 +868,7 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
} else { } else {
gen_op_load_gpr_T0(base); gen_op_load_gpr_T0(base);
gen_op_set_T1(offset); gen_op_set_T1(offset);
gen_op_add(); gen_op_addr_add();
} }
/* Don't do NOP if destination is zero: we must perform the actual /* Don't do NOP if destination is zero: we must perform the actual
* memory access * memory access