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tcg: Add tlb_dyn_max_bits to TCGContext 

Disconnect guest tlb parameters from TCG compilation.

Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-04-02 10:07:57 -07:00
parent aece72b76b
commit a66efde188
4 changed files with 4 additions and 2 deletions
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1
accel/tcg/translate-all.c
View File

@ -360,6 +360,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
#ifdef CONFIG_SOFTMMU
tcg_ctx->page_bits = TARGET_PAGE_BITS;
tcg_ctx->page_mask = TARGET_PAGE_MASK;
tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS;
#endif
tb_overflow:

1
include/tcg/tcg.h
View File

@ -563,6 +563,7 @@ struct TCGContext {
#ifdef CONFIG_SOFTMMU
int page_mask;
uint8_t page_bits;
uint8_t tlb_dyn_max_bits;
#endif
TCGRegSet reserved_regs;

2
tcg/aarch64/tcg-target.c.inc
View File

@ -1663,7 +1663,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
ldst->oi = oi;
ldst->addrlo_reg = addr_reg;
mask_type = (s->page_bits + CPU_TLB_DYN_MAX_BITS > 32
mask_type = (s->page_bits + s->tlb_dyn_max_bits > 32
? TCG_TYPE_I64 : TCG_TYPE_I32);
/* Load env_tlb(env)->f[mmu_idx].{mask,table} into {x0,x1}. */

2
tcg/i386/tcg-target.c.inc
View File

@ -1933,7 +1933,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
trexw = (ttype == TCG_TYPE_I32 ? 0 : P_REXW);
if (TCG_TYPE_PTR == TCG_TYPE_I64) {
hrexw = P_REXW;
if (s->page_bits + CPU_TLB_DYN_MAX_BITS > 32) {
if (s->page_bits + s->tlb_dyn_max_bits > 32) {
tlbtype = TCG_TYPE_I64;
tlbrexw = P_REXW;
}