mirror of https://github.com/xemu-project/xemu.git
hw/riscv/virt-acpi-build.c: Add MMU node in RHCT
MMU type information is available via MMU node in RHCT. Add this node in RHCT. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20231218150247.466427-10-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -152,6 +152,8 @@ static void build_rhct(GArray *table_data,
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size_t len, aligned_len;
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size_t len, aligned_len;
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uint32_t isa_offset, num_rhct_nodes, cmo_offset = 0;
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uint32_t isa_offset, num_rhct_nodes, cmo_offset = 0;
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RISCVCPU *cpu = &s->soc[0].harts[0];
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RISCVCPU *cpu = &s->soc[0].harts[0];
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uint32_t mmu_offset = 0;
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uint8_t satp_mode_max;
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char *isa;
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char *isa;
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AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id,
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AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id,
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@ -171,6 +173,10 @@ static void build_rhct(GArray *table_data,
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num_rhct_nodes++;
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num_rhct_nodes++;
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}
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}
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if (cpu->cfg.satp_mode.supported != 0) {
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num_rhct_nodes++;
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}
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/* Number of RHCT nodes*/
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/* Number of RHCT nodes*/
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build_append_int_noprefix(table_data, num_rhct_nodes, 4);
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build_append_int_noprefix(table_data, num_rhct_nodes, 4);
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@ -226,6 +232,26 @@ static void build_rhct(GArray *table_data,
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}
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}
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}
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}
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/* MMU node structure */
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if (cpu->cfg.satp_mode.supported != 0) {
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satp_mode_max = satp_mode_max_from_map(cpu->cfg.satp_mode.map);
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mmu_offset = table_data->len - table.table_offset;
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build_append_int_noprefix(table_data, 2, 2); /* Type */
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build_append_int_noprefix(table_data, 8, 2); /* Length */
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build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
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build_append_int_noprefix(table_data, 0, 1); /* Reserved */
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/* MMU Type */
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if (satp_mode_max == VM_1_10_SV57) {
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build_append_int_noprefix(table_data, 2, 1); /* Sv57 */
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} else if (satp_mode_max == VM_1_10_SV48) {
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build_append_int_noprefix(table_data, 1, 1); /* Sv48 */
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} else if (satp_mode_max == VM_1_10_SV39) {
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build_append_int_noprefix(table_data, 0, 1); /* Sv39 */
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} else {
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assert(1);
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}
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}
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/* Hart Info Node */
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/* Hart Info Node */
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for (int i = 0; i < arch_ids->len; i++) {
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for (int i = 0; i < arch_ids->len; i++) {
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len = 16;
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len = 16;
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@ -238,17 +264,25 @@ static void build_rhct(GArray *table_data,
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num_offsets++;
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num_offsets++;
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}
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}
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if (mmu_offset) {
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len += 4;
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num_offsets++;
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}
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build_append_int_noprefix(table_data, len, 2);
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build_append_int_noprefix(table_data, len, 2);
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build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
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build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
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/* Number of offsets */
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/* Number of offsets */
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build_append_int_noprefix(table_data, num_offsets, 2);
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build_append_int_noprefix(table_data, num_offsets, 2);
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build_append_int_noprefix(table_data, i, 4); /* ACPI Processor UID */
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build_append_int_noprefix(table_data, i, 4); /* ACPI Processor UID */
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/* Offsets */
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/* Offsets */
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build_append_int_noprefix(table_data, isa_offset, 4);
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build_append_int_noprefix(table_data, isa_offset, 4);
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if (cmo_offset) {
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if (cmo_offset) {
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build_append_int_noprefix(table_data, cmo_offset, 4);
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build_append_int_noprefix(table_data, cmo_offset, 4);
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}
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}
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if (mmu_offset) {
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build_append_int_noprefix(table_data, mmu_offset, 4);
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}
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}
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}
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acpi_table_end(linker, &table);
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acpi_table_end(linker, &table);
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