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Machine queue, 2020-02-28 

Cleanups:
 * Fix NMI() macro (Philippe Mathieu-Daudé)
 * Make MachineClass::is_default boolean, refuse multiple
   default machines (Philippe Mathieu-Daudé)
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Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging

Machine queue, 2020-02-28

Cleanups:
* Fix NMI() macro (Philippe Mathieu-Daudé)
* Make MachineClass::is_default boolean, refuse multiple
  default machines (Philippe Mathieu-Daudé)

# gpg: Signature made Fri 28 Feb 2020 21:03:20 GMT
# gpg:                using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6
# gpg:                issuer "ehabkost@redhat.com"
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/machine-next-pull-request:
  vl: Abort if multiple machines are registered as default
  hw: Make MachineClass::is_default a boolean type
  hw: Do not initialize MachineClass::is_default to 0
  hw/nmi: Fix the NMI() macro, based on INTERFACE_CHECK()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-03-02 09:37:06 +00:00
parent e0175b7163 6db1857ec9
commit a4c7ed8b89
26 changed files with 31 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
hw/alpha/dp264.c
View File

@ -181,7 +181,7 @@ static void clipper_machine_init(MachineClass *mc)
mc->init = clipper_init;
mc->block_default_type = IF_IDE;
mc->max_cpus = 4;
mc->is_default = 1;
mc->is_default = true;
mc->default_cpu_type = ALPHA_CPU_TYPE_NAME("ev67");
mc->default_ram_id = "ram";
}

2
hw/cris/axis_dev88.c
View File

@ -344,7 +344,7 @@ static void axisdev88_machine_init(MachineClass *mc)
{
mc->desc = "AXIS devboard 88";
mc->init = axisdev88_init;
mc->is_default = 1;
mc->is_default = true;
mc->default_cpu_type = CRIS_CPU_TYPE_NAME("crisv32");
mc->default_ram_id = "axisdev88.ram";
}

2
hw/hppa/machine.c
View File

@ -290,7 +290,7 @@ static void machine_hppa_machine_init(MachineClass *mc)
mc->block_default_type = IF_SCSI;
mc->max_cpus = HPPA_MAX_CPUS;
mc->default_cpus = 1;
mc->is_default = 1;
mc->is_default = true;
mc->default_ram_size = 512 * MiB;
mc->default_boot_order = "cd";
mc->default_ram_id = "ram";

10
hw/i386/pc_piix.c
View File

@ -423,7 +423,7 @@ static void pc_i440fx_5_0_machine_options(MachineClass *m)
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_machine_options(m);
m->alias = "pc";
m->is_default = 1;
m->is_default = true;
pcmc->default_cpu_version = 1;
}
@ -434,7 +434,7 @@ static void pc_i440fx_4_2_machine_options(MachineClass *m)
{
pc_i440fx_5_0_machine_options(m);
m->alias = NULL;
m->is_default = 0;
m->is_default = false;
compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
}
@ -446,7 +446,7 @@ static void pc_i440fx_4_1_machine_options(MachineClass *m)
{
pc_i440fx_4_2_machine_options(m);
m->alias = NULL;
m->is_default = 0;
m->is_default = false;
compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
}
@ -459,7 +459,7 @@ static void pc_i440fx_4_0_machine_options(MachineClass *m)
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_4_1_machine_options(m);
m->alias = NULL;
m->is_default = 0;
m->is_default = false;
pcmc->default_cpu_version = CPU_VERSION_LEGACY;
compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
@ -473,7 +473,7 @@ static void pc_i440fx_3_1_machine_options(MachineClass *m)
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_4_0_machine_options(m);
m->is_default = 0;
m->is_default = false;
pcmc->do_not_add_smb_acpi = true;
m->smbus_no_migration_support = true;
m->alias = NULL;

3
hw/lm32/lm32_boards.c
View File

@ -295,7 +295,7 @@ static void lm32_evr_class_init(ObjectClass *oc, void *data)
mc->desc = "LatticeMico32 EVR32 eval system";
mc->init = lm32_evr_init;
mc->is_default = 1;
mc->is_default = true;
mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
mc->default_ram_size = 64 * MiB;
mc->default_ram_id = "lm32_evr.sdram";
@ -313,7 +313,6 @@ static void lm32_uclinux_class_init(ObjectClass *oc, void *data)
mc->desc = "lm32 platform for uClinux and u-boot by Theobroma Systems";
mc->init = lm32_uclinux_init;
mc->is_default = 0;
mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
mc->default_ram_size = 64 * MiB;
mc->default_ram_id = "lm32_uclinux.sdram";

1
hw/lm32/milkymist.c
View File

@ -219,7 +219,6 @@ static void milkymist_machine_init(MachineClass *mc)
{
mc->desc = "Milkymist One";
mc->init = milkymist_init;
mc->is_default = 0;
mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
mc->default_ram_size = 128 * MiB;
mc->default_ram_id = "milkymist.sdram";

2
hw/m68k/mcf5208.c
View File

@ -350,7 +350,7 @@ static void mcf5208evb_machine_init(MachineClass *mc)
{
mc->desc = "MCF5208EVB";
mc->init = mcf5208evb_init;
mc->is_default = 1;
mc->is_default = true;
mc->default_cpu_type = M68K_CPU_TYPE_NAME("m5208");
mc->default_ram_id = "mcf5208.ram";
}

1
hw/m68k/q800.c
View File

@ -438,7 +438,6 @@ static void q800_machine_class_init(ObjectClass *oc, void *data)
mc->init = q800_init;
mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
mc->max_cpus = 1;
mc->is_default = 0;
mc->block_default_type = IF_SCSI;
mc->default_ram_id = "m68k_mac.ram";
}

1
hw/microblaze/petalogix_ml605_mmu.c
View File

@ -216,7 +216,6 @@ static void petalogix_ml605_machine_init(MachineClass *mc)
{
mc->desc = "PetaLogix linux refdesign for xilinx ml605 little endian";
mc->init = petalogix_ml605_init;
mc->is_default = 0;
}
DEFINE_MACHINE("petalogix-ml605", petalogix_ml605_machine_init)

2
hw/microblaze/petalogix_s3adsp1800_mmu.c
View File

@ -132,7 +132,7 @@ static void petalogix_s3adsp1800_machine_init(MachineClass *mc)
{
mc->desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800";
mc->init = petalogix_s3adsp1800_init;
mc->is_default = 1;
mc->is_default = true;
}
DEFINE_MACHINE("petalogix-s3adsp1800", petalogix_s3adsp1800_machine_init)

2
hw/mips/mips_malta.c
View File

@ -1439,7 +1439,7 @@ static void mips_malta_machine_init(MachineClass *mc)
mc->init = mips_malta_init;
mc->block_default_type = IF_IDE;
mc->max_cpus = 16;
mc->is_default = 1;
mc->is_default = true;
#ifdef TARGET_MIPS64
mc->default_cpu_type = MIPS_CPU_TYPE_NAME("20Kc");
#else

2
hw/moxie/moxiesim.c
View File

@ -150,7 +150,7 @@ static void moxiesim_machine_init(MachineClass *mc)
{
mc->desc = "Moxie simulator platform";
mc->init = moxiesim_init;
mc->is_default = 1;
mc->is_default = true;
mc->default_cpu_type = MOXIE_CPU_TYPE_NAME("MoxieLite");
}

2
hw/nios2/10m50_devboard.c
View File

@ -120,7 +120,7 @@ static void nios2_10m50_ghrd_machine_init(struct MachineClass *mc)
{
mc->desc = "Altera 10M50 GHRD Nios II design";
mc->init = nios2_10m50_ghrd_init;
mc->is_default = 1;
mc->is_default = true;
}
DEFINE_MACHINE("10m50-ghrd", nios2_10m50_ghrd_machine_init);

2
hw/openrisc/openrisc_sim.c
View File

@ -176,7 +176,7 @@ static void openrisc_sim_machine_init(MachineClass *mc)
mc->desc = "or1k simulation";
mc->init = openrisc_sim_init;
mc->max_cpus = 2;
mc->is_default = 1;
mc->is_default = true;
mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200");
}

2
hw/ppc/mac_oldworld.c
View File

@ -435,7 +435,7 @@ static void heathrow_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_IDE;
mc->max_cpus = MAX_CPUS;
#ifndef TARGET_PPC64
mc->is_default = 1;
mc->is_default = true;
#endif
/* TOFIX "cad" when Mac floppy is implemented */
mc->default_boot_order = "cd";

2
hw/ppc/spapr.c
View File

@ -4560,7 +4560,7 @@ static const TypeInfo spapr_machine_info = {
static void spapr_machine_latest_class_options(MachineClass *mc)
{
mc->alias = "pseries";
mc->is_default = 1;
mc->is_default = true;
}
#define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \

2
hw/riscv/spike.c
View File

@ -448,7 +448,7 @@ static void spike_machine_init(MachineClass *mc)
mc->desc = "RISC-V Spike Board";
mc->init = spike_board_init;
mc->max_cpus = 1;
mc->is_default = 1;
mc->is_default = true;
mc->default_cpu_type = SPIKE_V1_10_0_CPU;
}

2
hw/s390x/s390-virtio-ccw.c
View File

@ -630,7 +630,7 @@ bool css_migration_enabled(void)
mc->desc = "VirtIO-ccw based S390 machine v" verstr; \
if (latest) { \
mc->alias = "s390-ccw-virtio"; \
mc->is_default = 1; \
mc->is_default = true; \
} \
} \
static void ccw_machine_##suffix##_instance_init(Object *obj) \

2
hw/sh4/shix.c
View File

@ -82,7 +82,7 @@ static void shix_machine_init(MachineClass *mc)
{
mc->desc = "shix card";
mc->init = shix_init;
mc->is_default = 1;
mc->is_default = true;
mc->default_cpu_type = TYPE_SH7750R_CPU;
}

2
hw/sparc/sun4m.c
View File

@ -1402,7 +1402,7 @@ static void ss5_class_init(ObjectClass *oc, void *data)
mc->desc = "Sun4m platform, SPARCstation 5";
mc->init = ss5_init;
mc->block_default_type = IF_SCSI;
mc->is_default = 1;
mc->is_default = true;
mc->default_boot_order = "c";
mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
mc->default_display = "tcx";

2
hw/sparc64/sun4u.c
View File

@ -816,7 +816,7 @@ static void sun4u_class_init(ObjectClass *oc, void *data)
mc->init = sun4u_init;
mc->block_default_type = IF_IDE;
mc->max_cpus = 1; /* XXX for now */
mc->is_default = 1;
mc->is_default = true;
mc->default_boot_order = "c";
mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-UltraSparc-IIi");
mc->ignore_boot_device_suffixes = true;

1
hw/tricore/tricore_testboard.c
View File

@ -105,7 +105,6 @@ static void ttb_machine_init(MachineClass *mc)
{
mc->desc = "a minimal TriCore board";
mc->init = tricoreboard_init;
mc->is_default = 0;
mc->default_cpu_type = TRICORE_CPU_TYPE_NAME("tc1796");
}

2
hw/unicore32/puv3.c
View File

@ -140,7 +140,7 @@ static void puv3_machine_init(MachineClass *mc)
{
mc->desc = "PKUnity Version-3 based on UniCore32";
mc->init = puv3_init;
mc->is_default = 1;
mc->is_default = true;
mc->default_cpu_type = UNICORE32_CPU_TYPE_NAME("UniCore-II");
}

4
include/hw/boards.h
View File

@ -81,6 +81,8 @@ typedef struct {
* @max_cpus: maximum number of CPUs supported. Default: 1
* @min_cpus: minimum number of CPUs supported. Default: 1
* @default_cpus: number of CPUs instantiated if none are specified. Default: 1
* @is_default:
* If true QEMU will use this machine by default if no '-M' option is given.
* @get_hotplug_handler: this function is called during bus-less
* device hotplug. If defined it returns pointer to an instance
* of HotplugHandler object, which handles hotplug operation
@ -181,7 +183,7 @@ struct MachineClass {
no_sdcard:1,
pci_allow_0_address:1,
legacy_fw_cfg_order:1;
int is_default;
bool is_default;
const char *default_machine_opts;
const char *default_boot_order;
const char *default_display;

2
include/hw/nmi.h
View File

@ -31,7 +31,7 @@
#define NMI_GET_CLASS(obj) \
OBJECT_GET_CLASS(NMIClass, (obj), TYPE_NMI)
#define NMI(obj) \
INTERFACE_CHECK(NMI, (obj), TYPE_NMI)
INTERFACE_CHECK(NMIState, (obj), TYPE_NMI)
typedef struct NMIState NMIState;

6
softmmu/vl.c
View File

@ -1163,16 +1163,18 @@ static MachineClass *find_machine(const char *name, GSList *machines)
static MachineClass *find_default_machine(GSList *machines)
{
GSList *el;
MachineClass *default_machineclass = NULL;
for (el = machines; el; el = el->next) {
MachineClass *mc = el->data;
if (mc->is_default) {
return mc;
assert(default_machineclass == NULL && "Multiple default machines");
default_machineclass = mc;
}
}
return NULL;
return default_machineclass;
}
static int machine_help_func(QemuOpts *opts, MachineState *machine)