mirror of https://github.com/xemu-project/xemu.git
Fix a lot of debug traces for PowerPC emulation: use logfile instead of stdout
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2677 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
9898128f55
commit
a496775f87
106
hw/ppc.c
106
hw/ppc.c
|
@ -40,8 +40,11 @@ void ppc_set_irq (CPUState *env, int n_IRQ, int level)
|
|||
cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
|
||||
}
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: %p n_IRQ %d level %d => pending %08x req %08x\n", __func__,
|
||||
env, n_IRQ, level, env->pending_interrupts, env->interrupt_request);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: %p n_IRQ %d level %d => pending %08x req %08x\n",
|
||||
__func__, env, n_IRQ, level,
|
||||
env->pending_interrupts, env->interrupt_request);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
@ -52,7 +55,10 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
|
|||
int cur_level;
|
||||
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: env %p pin %d level %d\n", __func__, env, pin, level);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: env %p pin %d level %d\n", __func__,
|
||||
env, pin, level);
|
||||
}
|
||||
#endif
|
||||
cur_level = (env->irq_input_state >> pin) & 1;
|
||||
/* Don't generate spurious events */
|
||||
|
@ -61,14 +67,20 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
|
|||
case PPC6xx_INPUT_INT:
|
||||
/* Level sensitive - active high */
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: set the external IRQ state to %d\n", __func__, level);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: set the external IRQ state to %d\n",
|
||||
__func__, level);
|
||||
}
|
||||
#endif
|
||||
ppc_set_irq(env, PPC_INTERRUPT_EXT, level);
|
||||
break;
|
||||
case PPC6xx_INPUT_SMI:
|
||||
/* Level sensitive - active high */
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: set the SMI IRQ state to %d\n", __func__, level);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: set the SMI IRQ state to %d\n",
|
||||
__func__, level);
|
||||
}
|
||||
#endif
|
||||
ppc_set_irq(env, PPC_INTERRUPT_SMI, level);
|
||||
break;
|
||||
|
@ -79,7 +91,10 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
|
|||
*/
|
||||
if (cur_level == 1 && level == 0) {
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: raise machine check state\n", __func__);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: raise machine check state\n",
|
||||
__func__);
|
||||
}
|
||||
#endif
|
||||
ppc_set_irq(env, PPC_INTERRUPT_MCK, 1);
|
||||
}
|
||||
|
@ -89,12 +104,16 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
|
|||
/* XXX: TODO: relay the signal to CKSTP_OUT pin */
|
||||
if (level) {
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: stop the CPU\n", __func__);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: stop the CPU\n", __func__);
|
||||
}
|
||||
#endif
|
||||
env->halted = 1;
|
||||
} else {
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: restart the CPU\n", __func__);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: restart the CPU\n", __func__);
|
||||
}
|
||||
#endif
|
||||
env->halted = 0;
|
||||
}
|
||||
|
@ -104,7 +123,9 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
|
|||
if (level) {
|
||||
#if 0 // XXX: TOFIX
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: reset the CPU\n", __func__);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: reset the CPU\n", __func__);
|
||||
}
|
||||
#endif
|
||||
cpu_reset(env);
|
||||
#endif
|
||||
|
@ -112,14 +133,19 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
|
|||
break;
|
||||
case PPC6xx_INPUT_SRESET:
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: set the RESET IRQ state to %d\n", __func__, level);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: set the RESET IRQ state to %d\n",
|
||||
__func__, level);
|
||||
}
|
||||
#endif
|
||||
ppc_set_irq(env, PPC_INTERRUPT_RESET, level);
|
||||
break;
|
||||
default:
|
||||
/* Unknown pin - do nothing */
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: unknown IRQ pin %d\n", __func__, pin);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: unknown IRQ pin %d\n", __func__, pin);
|
||||
}
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
@ -176,7 +202,10 @@ static void ppc405_set_irq (void *opaque, int pin, int level)
|
|||
case PPC405_INPUT_INT:
|
||||
/* Level sensitive - active high */
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: set the external IRQ state to %d\n", __func__, level);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: set the external IRQ state to %d\n",
|
||||
__func__, level);
|
||||
}
|
||||
#endif
|
||||
ppc_set_irq(env, PPC_INTERRUPT_EXT, level);
|
||||
break;
|
||||
|
@ -184,12 +213,16 @@ static void ppc405_set_irq (void *opaque, int pin, int level)
|
|||
/* Level sensitive - active low */
|
||||
if (level) {
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: stop the CPU\n", __func__);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: stop the CPU\n", __func__);
|
||||
}
|
||||
#endif
|
||||
env->halted = 1;
|
||||
} else {
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: restart the CPU\n", __func__);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: restart the CPU\n", __func__);
|
||||
}
|
||||
#endif
|
||||
env->halted = 0;
|
||||
}
|
||||
|
@ -197,14 +230,19 @@ static void ppc405_set_irq (void *opaque, int pin, int level)
|
|||
case PPC405_INPUT_DEBUG:
|
||||
/* Level sensitive - active high */
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: set the external IRQ state to %d\n", __func__, level);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: set the external IRQ state to %d\n",
|
||||
__func__, level);
|
||||
}
|
||||
#endif
|
||||
ppc_set_irq(env, EXCP_40x_DEBUG, level);
|
||||
break;
|
||||
default:
|
||||
/* Unknown pin - do nothing */
|
||||
#if defined(PPC_DEBUG_IRQ)
|
||||
printf("%s: unknown IRQ pin %d\n", __func__, pin);
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: unknown IRQ pin %d\n", __func__, pin);
|
||||
}
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
@ -217,7 +255,6 @@ static void ppc405_set_irq (void *opaque, int pin, int level)
|
|||
|
||||
void ppc405_irq_init (CPUState *env)
|
||||
{
|
||||
printf("%s\n", __func__);
|
||||
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc405_set_irq, env, 7);
|
||||
}
|
||||
|
||||
|
@ -255,8 +292,10 @@ uint32_t cpu_ppc_load_tbl (CPUState *env)
|
|||
now = time(NULL);
|
||||
if (last_time != now) {
|
||||
last_time = now;
|
||||
printf("%s: tb=0x%016lx %d %08lx\n",
|
||||
__func__, tb, now, tb_env->tb_offset);
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "%s: tb=0x%016lx %d %08lx\n",
|
||||
__func__, tb, now, tb_env->tb_offset);
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
@ -271,7 +310,9 @@ uint32_t cpu_ppc_load_tbu (CPUState *env)
|
|||
|
||||
tb = cpu_ppc_get_tb(tb_env);
|
||||
#ifdef DEBUG_TB
|
||||
printf("%s: tb=0x%016lx\n", __func__, tb);
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb);
|
||||
}
|
||||
#endif
|
||||
|
||||
return tb >> 32;
|
||||
|
@ -282,7 +323,9 @@ static void cpu_ppc_store_tb (ppc_tb_t *tb_env, uint64_t value)
|
|||
tb_env->tb_offset = muldiv64(value, ticks_per_sec, tb_env->tb_freq)
|
||||
- qemu_get_clock(vm_clock);
|
||||
#ifdef DEBUG_TB
|
||||
printf("%s: tb=0x%016lx offset=%08x\n", __func__, value);
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "%s: tb=0x%016lx offset=%08x\n", __func__, value);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
@ -314,7 +357,9 @@ uint32_t cpu_ppc_load_decr (CPUState *env)
|
|||
else
|
||||
decr = -muldiv64(-diff, tb_env->tb_freq, ticks_per_sec);
|
||||
#if defined(DEBUG_TB)
|
||||
printf("%s: 0x%08x\n", __func__, decr);
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "%s: 0x%08x\n", __func__, decr);
|
||||
}
|
||||
#endif
|
||||
|
||||
return decr;
|
||||
|
@ -327,7 +372,9 @@ static inline void cpu_ppc_decr_excp (CPUState *env)
|
|||
{
|
||||
/* Raise it */
|
||||
#ifdef DEBUG_TB
|
||||
printf("raise decrementer exception\n");
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "raise decrementer exception\n");
|
||||
}
|
||||
#endif
|
||||
ppc_set_irq(env, PPC_INTERRUPT_DECR, 1);
|
||||
}
|
||||
|
@ -339,7 +386,9 @@ static void _cpu_ppc_store_decr (CPUState *env, uint32_t decr,
|
|||
uint64_t now, next;
|
||||
|
||||
#ifdef DEBUG_TB
|
||||
printf("%s: 0x%08x => 0x%08x\n", __func__, decr, value);
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "%s: 0x%08x => 0x%08x\n", __func__, decr, value);
|
||||
}
|
||||
#endif
|
||||
now = qemu_get_clock(vm_clock);
|
||||
next = now + muldiv64(value, ticks_per_sec, tb_env->tb_freq);
|
||||
|
@ -578,17 +627,20 @@ void store_40x_pit (CPUState *env, target_ulong val)
|
|||
|
||||
tb_env = env->tb_env;
|
||||
ppcemb_timer = tb_env->opaque;
|
||||
if (loglevel)
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "%s %p %p\n", __func__, tb_env, ppcemb_timer);
|
||||
}
|
||||
ppcemb_timer->pit_reload = val;
|
||||
if (val == 0) {
|
||||
/* Stop PIT */
|
||||
if (loglevel)
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "%s: stop PIT\n", __func__);
|
||||
}
|
||||
qemu_del_timer(tb_env->decr_timer);
|
||||
} else {
|
||||
if (loglevel)
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "%s: start PIT 0x" ADDRX "\n", __func__, val);
|
||||
}
|
||||
now = qemu_get_clock(vm_clock);
|
||||
next = now + muldiv64(val, ticks_per_sec, tb_env->tb_freq);
|
||||
if (next == now)
|
||||
|
|
|
@ -649,10 +649,10 @@ int mmu4xx_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
|
|||
}
|
||||
mask = ~(tlb->size - 1);
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "%s: TLB %d address " ADDRX " PID " ADDRX " <=> "
|
||||
ADDRX " " ADDRX " " ADDRX "\n",
|
||||
__func__, i, address, env->spr[SPR_40x_PID],
|
||||
tlb->EPN, mask, tlb->PID);
|
||||
fprintf(logfile, "%s: TLB %d address " ADDRX " PID %d <=> "
|
||||
ADDRX " " ADDRX " %d\n",
|
||||
__func__, i, address, (int)env->spr[SPR_40x_PID],
|
||||
tlb->EPN, mask, (int)tlb->PID);
|
||||
}
|
||||
/* Check PID */
|
||||
if (tlb->PID != 0 && tlb->PID != env->spr[SPR_40x_PID])
|
||||
|
@ -1450,9 +1450,6 @@ void do_interrupt (CPUState *env)
|
|||
if (loglevel) {
|
||||
fprintf(logfile, "DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX
|
||||
"\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]);
|
||||
} else {
|
||||
printf("DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX "\n",
|
||||
env->spr[SPR_DSISR], env->spr[SPR_DAR]);
|
||||
}
|
||||
#endif
|
||||
goto store_next;
|
||||
|
@ -1495,7 +1492,9 @@ void do_interrupt (CPUState *env)
|
|||
case EXCP_FP:
|
||||
if (msr_fe0 == 0 && msr_fe1 == 0) {
|
||||
#if defined (DEBUG_EXCEPTIONS)
|
||||
printf("Ignore floating point exception\n");
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "Ignore floating point exception\n");
|
||||
}
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
@ -1508,7 +1507,12 @@ void do_interrupt (CPUState *env)
|
|||
env->fpscr[7] |= 0x4;
|
||||
break;
|
||||
case EXCP_INVAL:
|
||||
// printf("Invalid instruction at 0x" ADDRX "\n", env->nip);
|
||||
#if defined (DEBUG_EXCEPTIONS)
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "Invalid instruction at 0x" ADDRX "\n",
|
||||
env->nip);
|
||||
}
|
||||
#endif
|
||||
msr |= 0x00080000;
|
||||
break;
|
||||
case EXCP_PRIV:
|
||||
|
@ -1609,8 +1613,10 @@ void do_interrupt (CPUState *env)
|
|||
case PPC_FLAGS_EXCP_40x:
|
||||
/* PIT on 4xx */
|
||||
msr &= ~0xFFFF0000;
|
||||
#if defined (DEBUG_EXCEPTIONS)
|
||||
if (loglevel != 0)
|
||||
fprintf(logfile, "PIT exception\n");
|
||||
#endif
|
||||
goto store_next;
|
||||
case PPC_FLAGS_EXCP_602:
|
||||
case PPC_FLAGS_EXCP_603:
|
||||
|
@ -1630,8 +1636,10 @@ void do_interrupt (CPUState *env)
|
|||
case PPC_FLAGS_EXCP_40x:
|
||||
/* FIT on 4xx */
|
||||
msr &= ~0xFFFF0000;
|
||||
#if defined (DEBUG_EXCEPTIONS)
|
||||
if (loglevel != 0)
|
||||
fprintf(logfile, "FIT exception\n");
|
||||
#endif
|
||||
goto store_next;
|
||||
default:
|
||||
cpu_abort(env, "Invalid exception 0x1010 !\n");
|
||||
|
@ -1644,8 +1652,10 @@ void do_interrupt (CPUState *env)
|
|||
case PPC_FLAGS_EXCP_40x:
|
||||
/* Watchdog on 4xx */
|
||||
msr &= ~0xFFFF0000;
|
||||
#if defined (DEBUG_EXCEPTIONS)
|
||||
if (loglevel != 0)
|
||||
fprintf(logfile, "WDT exception\n");
|
||||
#endif
|
||||
goto store_next;
|
||||
case PPC_FLAGS_EXCP_BOOKE:
|
||||
srr_0 = &env->spr[SPR_BOOKE_CSRR0];
|
||||
|
@ -1929,11 +1939,12 @@ void ppc_hw_interrupt (CPUPPCState *env)
|
|||
{
|
||||
int raised = 0;
|
||||
|
||||
#if 0
|
||||
printf("%s: %p pending %08x req %08x %08x me %d ee %d\n",
|
||||
__func__, env, env->pending_interrupts,
|
||||
env->interrupt_request, interrupt_request,
|
||||
msr_me, msr_ee);
|
||||
#if 1
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "%s: %p pending %08x req %08x me %d ee %d\n",
|
||||
__func__, env, env->pending_interrupts,
|
||||
env->interrupt_request, msr_me, msr_ee);
|
||||
}
|
||||
#endif
|
||||
/* Raise it */
|
||||
if (env->pending_interrupts & (1 << PPC_INTERRUPT_RESET)) {
|
||||
|
@ -2007,3 +2018,17 @@ void ppc_hw_interrupt (CPUPPCState *env)
|
|||
}
|
||||
}
|
||||
#endif /* !CONFIG_USER_ONLY */
|
||||
|
||||
void cpu_dump_EA (target_ulong EA)
|
||||
{
|
||||
FILE *f;
|
||||
|
||||
if (logfile) {
|
||||
f = logfile;
|
||||
} else {
|
||||
f = stdout;
|
||||
return;
|
||||
}
|
||||
fprintf(f, "Memory access at address " TARGET_FMT_lx "\n", EA);
|
||||
}
|
||||
|
||||
|
|
|
@ -130,6 +130,13 @@
|
|||
#define REG 31
|
||||
#include "op_template.h"
|
||||
|
||||
|
||||
void OPPROTO op_print_mem_EA (void)
|
||||
{
|
||||
do_print_mem_EA(T0);
|
||||
RETURN();
|
||||
}
|
||||
|
||||
/* PowerPC state maintenance operations */
|
||||
/* set_Rc0 */
|
||||
PPC_OP(set_Rc0)
|
||||
|
@ -360,15 +367,33 @@ void OPPROTO op_store_msr_32 (void)
|
|||
#endif
|
||||
|
||||
/* SPR */
|
||||
PPC_OP(load_spr)
|
||||
void OPPROTO op_load_spr (void)
|
||||
{
|
||||
T0 = regs->spr[PARAM(1)];
|
||||
T0 = env->spr[PARAM1];
|
||||
RETURN();
|
||||
}
|
||||
|
||||
PPC_OP(store_spr)
|
||||
void OPPROTO op_store_spr (void)
|
||||
{
|
||||
regs->spr[PARAM(1)] = T0;
|
||||
env->spr[PARAM1] = T0;
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void OPPROTO op_load_dump_spr (void)
|
||||
{
|
||||
T0 = ppc_load_dump_spr(PARAM1);
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void OPPROTO op_store_dump_spr (void)
|
||||
{
|
||||
ppc_store_dump_spr(PARAM1, T0);
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void OPPROTO op_mask_spr (void)
|
||||
{
|
||||
env->spr[PARAM1] &= ~T0;
|
||||
RETURN();
|
||||
}
|
||||
|
||||
|
|
|
@ -68,6 +68,12 @@ void do_raise_exception (uint32_t exception)
|
|||
do_raise_exception_err(exception, 0);
|
||||
}
|
||||
|
||||
void cpu_dump_EA (target_ulong EA);
|
||||
void do_print_mem_EA (target_ulong EA)
|
||||
{
|
||||
cpu_dump_EA(EA);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Registers load and stores */
|
||||
void do_load_cr (void)
|
||||
|
@ -181,6 +187,25 @@ void do_store_fpscr (uint32_t mask)
|
|||
set_float_rounding_mode(rnd_type, &env->fp_status);
|
||||
}
|
||||
|
||||
target_ulong ppc_load_dump_spr (int sprn)
|
||||
{
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n",
|
||||
sprn, sprn, env->spr[sprn]);
|
||||
}
|
||||
|
||||
return env->spr[sprn];
|
||||
}
|
||||
|
||||
void ppc_store_dump_spr (int sprn, target_ulong val)
|
||||
{
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "Write SPR %d %03x => " ADDRX " <= " ADDRX "\n",
|
||||
sprn, sprn, env->spr[sprn], val);
|
||||
}
|
||||
env->spr[sprn] = val;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Fixed point operations helpers */
|
||||
#if defined(TARGET_PPC64)
|
||||
|
@ -1250,10 +1275,14 @@ void do_load_dcr (void)
|
|||
target_ulong val;
|
||||
|
||||
if (unlikely(env->dcr_env == NULL)) {
|
||||
printf("No DCR environment\n");
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "No DCR environment\n");
|
||||
}
|
||||
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL);
|
||||
} else if (unlikely(ppc_dcr_read(env->dcr_env, T0, &val) != 0)) {
|
||||
printf("DCR read error\n");
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "DCR read error %d %03x\n", (int)T0, (int)T0);
|
||||
}
|
||||
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG);
|
||||
} else {
|
||||
T0 = val;
|
||||
|
@ -1263,10 +1292,14 @@ void do_load_dcr (void)
|
|||
void do_store_dcr (void)
|
||||
{
|
||||
if (unlikely(env->dcr_env == NULL)) {
|
||||
printf("No DCR environment\n");
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "No DCR environment\n");
|
||||
}
|
||||
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL);
|
||||
} else if (unlikely(ppc_dcr_write(env->dcr_env, T0, T1) != 0)) {
|
||||
printf("DCR write error\n");
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "DCR write error %d %03x\n", (int)T0, (int)T0);
|
||||
}
|
||||
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -50,6 +50,8 @@ void glue(do_icbi_64, MEMSUFFIX) (void);
|
|||
|
||||
#else
|
||||
|
||||
void do_print_mem_EA (target_ulong EA);
|
||||
|
||||
/* Registers load and stores */
|
||||
void do_load_cr (void);
|
||||
void do_store_cr (uint32_t mask);
|
||||
|
@ -57,6 +59,8 @@ void do_load_xer (void);
|
|||
void do_store_xer (void);
|
||||
void do_load_fpscr (void);
|
||||
void do_store_fpscr (uint32_t mask);
|
||||
target_ulong ppc_load_dump_spr (int sprn);
|
||||
void ppc_store_dump_spr (int sprn, target_ulong val);
|
||||
|
||||
/* Integer arithmetic helpers */
|
||||
void do_adde (void);
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
|
||||
//#define DO_SINGLE_STEP
|
||||
//#define PPC_DEBUG_DISAS
|
||||
//#define DEBUG_MEMORY_ACCESSES
|
||||
//#define DO_PPC_STATISTICS
|
||||
|
||||
#if defined(USE_DIRECT_JUMP)
|
||||
|
@ -1745,6 +1746,9 @@ static inline void gen_addr_imm_index (DisasContext *ctx, int maskl)
|
|||
if (likely(simm != 0))
|
||||
gen_op_addi(simm);
|
||||
}
|
||||
#ifdef DEBUG_MEMORY_ACCESSES
|
||||
gen_op_print_mem_EA();
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void gen_addr_reg_index (DisasContext *ctx)
|
||||
|
@ -1756,6 +1760,9 @@ static inline void gen_addr_reg_index (DisasContext *ctx)
|
|||
gen_op_load_gpr_T1(rB(ctx->opcode));
|
||||
gen_op_add();
|
||||
}
|
||||
#ifdef DEBUG_MEMORY_ACCESSES
|
||||
gen_op_print_mem_EA();
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void gen_addr_register (DisasContext *ctx)
|
||||
|
@ -1765,6 +1772,9 @@ static inline void gen_addr_register (DisasContext *ctx)
|
|||
} else {
|
||||
gen_op_load_gpr_T0(rA(ctx->opcode));
|
||||
}
|
||||
#ifdef DEBUG_MEMORY_ACCESSES
|
||||
gen_op_print_mem_EA();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*** Integer load ***/
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
|
||||
//#define PPC_DUMP_CPU
|
||||
//#define PPC_DEBUG_SPR
|
||||
//#define PPC_DEBUG_IRQ
|
||||
|
||||
struct ppc_def_t {
|
||||
const unsigned char *name;
|
||||
|
@ -61,6 +62,23 @@ static void spr_write_generic (void *opaque, int sprn)
|
|||
gen_op_store_spr(sprn);
|
||||
}
|
||||
|
||||
static void spr_read_dump (void *opaque, int sprn)
|
||||
{
|
||||
gen_op_load_dump_spr(sprn);
|
||||
}
|
||||
|
||||
static void spr_write_dump (void *opaque, int sprn)
|
||||
{
|
||||
gen_op_store_dump_spr(sprn);
|
||||
}
|
||||
|
||||
#if !defined(CONFIG_USER_ONLY)
|
||||
static void spr_write_clear (void *opaque, int sprn)
|
||||
{
|
||||
gen_op_mask_spr(sprn);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* SPR common to all PowerPC */
|
||||
/* XER */
|
||||
static void spr_read_xer (void *opaque, int sprn)
|
||||
|
|
Loading…
Reference in New Issue