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target/s390x: Simplify per_ifetch, per_check_exception
Set per_address and ilen in per_ifetch; this is valid for all PER exceptions and will last until the end of the instruction. Therefore we don't need to give the same data to per_check_exception. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-13-richard.henderson@linaro.org> [thuth: Silence checkpatch.pl errors] Signed-off-by: Thomas Huth <thuth@redhat.com>
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@ -359,9 +359,9 @@ DEF_HELPER_FLAGS_4(ipte, TCG_CALL_NO_RWG, void, env, i64, i64, i32)
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DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_NO_RWG, void, env)
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DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_NO_RWG, void, env)
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DEF_HELPER_FLAGS_1(purge, TCG_CALL_NO_RWG, void, env)
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DEF_HELPER_FLAGS_1(purge, TCG_CALL_NO_RWG, void, env)
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DEF_HELPER_3(lra, i64, env, i64, i64)
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DEF_HELPER_3(lra, i64, env, i64, i64)
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DEF_HELPER_FLAGS_3(per_check_exception, TCG_CALL_NO_WG, void, env, i64, i32)
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DEF_HELPER_FLAGS_1(per_check_exception, TCG_CALL_NO_WG, void, env)
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DEF_HELPER_FLAGS_3(per_branch, TCG_CALL_NO_WG, void, env, i64, i32)
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DEF_HELPER_FLAGS_3(per_branch, TCG_CALL_NO_WG, void, env, i64, i32)
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DEF_HELPER_FLAGS_2(per_ifetch, TCG_CALL_NO_WG, void, env, i64)
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DEF_HELPER_FLAGS_2(per_ifetch, TCG_CALL_NO_WG, void, env, i32)
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DEF_HELPER_FLAGS_2(per_store_real, TCG_CALL_NO_WG, noreturn, env, i32)
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DEF_HELPER_FLAGS_2(per_store_real, TCG_CALL_NO_WG, noreturn, env, i32)
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DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env)
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DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env)
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@ -604,12 +604,10 @@ static G_NORETURN void per_raise_exception_log(CPUS390XState *env)
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per_raise_exception(env);
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per_raise_exception(env);
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}
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}
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void HELPER(per_check_exception)(CPUS390XState *env, uint64_t next_pc,
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void HELPER(per_check_exception)(CPUS390XState *env)
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uint32_t ilen)
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{
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{
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/* psw_addr, per_address and int_pgm_ilen are already set. */
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if (unlikely(env->per_perc_atmid)) {
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if (unlikely(env->per_perc_atmid)) {
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env->psw.addr = next_pc;
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env->int_pgm_ilen = ilen;
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per_raise_exception_log(env);
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per_raise_exception_log(env);
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}
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}
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}
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}
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@ -639,23 +637,20 @@ void HELPER(per_branch)(CPUS390XState *env, uint64_t dest, uint32_t ilen)
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per_raise_exception_log(env);
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per_raise_exception_log(env);
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}
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}
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void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
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void HELPER(per_ifetch)(CPUS390XState *env, uint32_t ilen)
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{
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{
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if (get_per_in_range(env, addr)) {
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if (get_per_in_range(env, env->psw.addr)) {
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env->per_address = addr;
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env->per_address = env->psw.addr;
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env->int_pgm_ilen = ilen;
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env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
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env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
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/* If the instruction has to be nullified, trigger the
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/* If the instruction has to be nullified, trigger the
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exception immediately. */
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exception immediately. */
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if (env->cregs[9] & PER_CR9_EVENT_IFETCH_NULLIFICATION) {
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if (env->cregs[9] & PER_CR9_EVENT_IFETCH_NULLIFICATION) {
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CPUState *cs = env_cpu(env);
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env->per_perc_atmid |= PER_CODE_EVENT_NULLIFICATION;
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env->per_perc_atmid |= PER_CODE_EVENT_NULLIFICATION;
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env->int_pgm_code = PGM_PER;
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qemu_log_mask(CPU_LOG_INT, "PER interrupt before 0x%" PRIx64 "\n",
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env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
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env->per_address);
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per_raise_exception(env);
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cs->exception_index = EXCP_PGM;
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cpu_loop_exit(cs);
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}
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}
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}
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}
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}
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}
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@ -6258,8 +6258,8 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s)
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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if (s->base.tb->flags & FLAG_MASK_PER_IFETCH) {
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if (s->base.tb->flags & FLAG_MASK_PER_IFETCH) {
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TCGv_i64 addr = tcg_constant_i64(s->base.pc_next);
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/* With ifetch set, psw_addr and cc_op are always up-to-date. */
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gen_helper_per_ifetch(tcg_env, addr);
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gen_helper_per_ifetch(tcg_env, tcg_constant_i32(s->ilen));
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}
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}
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#endif
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#endif
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@ -6358,14 +6358,18 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s)
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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if (s->base.tb->flags & FLAG_MASK_PER_IFETCH) {
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if (s->base.tb->flags & FLAG_MASK_PER_IFETCH) {
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TCGv_i64 next_pc = psw_addr;
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switch (ret) {
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case DISAS_TOO_MANY:
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if (ret == DISAS_NEXT || ret == DISAS_TOO_MANY) {
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s->base.is_jmp = DISAS_PC_CC_UPDATED;
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next_pc = tcg_constant_i64(s->pc_tmp);
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/* fall through */
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case DISAS_NEXT:
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tcg_gen_movi_i64(psw_addr, s->pc_tmp);
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break;
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default:
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break;
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}
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}
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update_cc_op(s);
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update_cc_op(s);
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gen_helper_per_check_exception(tcg_env, next_pc,
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gen_helper_per_check_exception(tcg_env);
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tcg_constant_i32(s->ilen));
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}
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}
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#endif
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#endif
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