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target/s390x: Simplify per_ifetch, per_check_exception 

Set per_address and ilen in per_ifetch; this is valid for
all PER exceptions and will last until the end of the
instruction.  Therefore we don't need to give the same
data to per_check_exception.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240502054417.234340-13-richard.henderson@linaro.org>
[thuth: Silence checkpatch.pl errors]
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Richard Henderson 2024-05-01 22:44:15 -07:00 committed by Thomas Huth
parent 67b765d3f3
commit a47d08ee0d
3 changed files with 23 additions and 24 deletions
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4
target/s390x/helper.h
View File

@ -359,9 +359,9 @@ DEF_HELPER_FLAGS_4(ipte, TCG_CALL_NO_RWG, void, env, i64, i64, i32)
DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_NO_RWG, void, env)
DEF_HELPER_FLAGS_1(purge, TCG_CALL_NO_RWG, void, env)
DEF_HELPER_3(lra, i64, env, i64, i64)
DEF_HELPER_FLAGS_3(per_check_exception, TCG_CALL_NO_WG, void, env, i64, i32)
DEF_HELPER_FLAGS_1(per_check_exception, TCG_CALL_NO_WG, void, env)
DEF_HELPER_FLAGS_3(per_branch, TCG_CALL_NO_WG, void, env, i64, i32)
DEF_HELPER_FLAGS_2(per_ifetch, TCG_CALL_NO_WG, void, env, i64)
DEF_HELPER_FLAGS_2(per_ifetch, TCG_CALL_NO_WG, void, env, i32)
DEF_HELPER_FLAGS_2(per_store_real, TCG_CALL_NO_WG, noreturn, env, i32)
DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env)

23
target/s390x/tcg/misc_helper.c
View File

@ -604,12 +604,10 @@ static G_NORETURN void per_raise_exception_log(CPUS390XState *env)
per_raise_exception(env);
}
void HELPER(per_check_exception)(CPUS390XState *env, uint64_t next_pc,
uint32_t ilen)
void HELPER(per_check_exception)(CPUS390XState *env)
{
/* psw_addr, per_address and int_pgm_ilen are already set. */
if (unlikely(env->per_perc_atmid)) {
env->psw.addr = next_pc;
env->int_pgm_ilen = ilen;
per_raise_exception_log(env);
}
}
@ -639,23 +637,20 @@ void HELPER(per_branch)(CPUS390XState *env, uint64_t dest, uint32_t ilen)
per_raise_exception_log(env);
}
void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
void HELPER(per_ifetch)(CPUS390XState *env, uint32_t ilen)
{
if (get_per_in_range(env, addr)) {
env->per_address = addr;
if (get_per_in_range(env, env->psw.addr)) {
env->per_address = env->psw.addr;
env->int_pgm_ilen = ilen;
env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
/* If the instruction has to be nullified, trigger the
exception immediately. */
if (env->cregs[9] & PER_CR9_EVENT_IFETCH_NULLIFICATION) {
CPUState *cs = env_cpu(env);
env->per_perc_atmid |= PER_CODE_EVENT_NULLIFICATION;
env->int_pgm_code = PGM_PER;
env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
cs->exception_index = EXCP_PGM;
cpu_loop_exit(cs);
qemu_log_mask(CPU_LOG_INT, "PER interrupt before 0x%" PRIx64 "\n",
env->per_address);
per_raise_exception(env);
}
}
}

20
target/s390x/tcg/translate.c
View File

@ -6258,8 +6258,8 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s)
#ifndef CONFIG_USER_ONLY
if (s->base.tb->flags & FLAG_MASK_PER_IFETCH) {
TCGv_i64 addr = tcg_constant_i64(s->base.pc_next);
gen_helper_per_ifetch(tcg_env, addr);
/* With ifetch set, psw_addr and cc_op are always up-to-date. */
gen_helper_per_ifetch(tcg_env, tcg_constant_i32(s->ilen));
}
#endif
@ -6358,14 +6358,18 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s)
#ifndef CONFIG_USER_ONLY
if (s->base.tb->flags & FLAG_MASK_PER_IFETCH) {
TCGv_i64 next_pc = psw_addr;
if (ret == DISAS_NEXT || ret == DISAS_TOO_MANY) {
next_pc = tcg_constant_i64(s->pc_tmp);
switch (ret) {
case DISAS_TOO_MANY:
s->base.is_jmp = DISAS_PC_CC_UPDATED;
/* fall through */
case DISAS_NEXT:
tcg_gen_movi_i64(psw_addr, s->pc_tmp);
break;
default:
break;
}
update_cc_op(s);
gen_helper_per_check_exception(tcg_env, next_pc,
tcg_constant_i32(s->ilen));
gen_helper_per_check_exception(tcg_env);
}
#endif