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target/loongarch: Implement lbt registers save/restore function 

Six registers scr0 - scr3, eflags and ftop are added in percpu vmstate.
And two functions kvm_loongarch_get_lbt/kvm_loongarch_put_lbt are added
to save/restore lbt registers.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240929070405.235200-3-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
This commit is contained in:
Bibo Mao 2024-09-29 15:04:05 +08:00 committed by Song Gao
parent c23a53d894
commit a45df28601
3 changed files with 98 additions and 0 deletions
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12
target/loongarch/cpu.h
View File

@ -286,6 +286,17 @@ enum loongarch_features {
LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
};
typedef struct LoongArchBT {
/* scratch registers */
uint64_t scr0;
uint64_t scr1;
uint64_t scr2;
uint64_t scr3;
/* loongarch eflags */
uint32_t eflags;
uint32_t ftop;
} lbt_t;
typedef struct CPUArchState {
uint64_t gpr[32];
uint64_t pc;
@ -293,6 +304,7 @@ typedef struct CPUArchState {
fpr_t fpr[32];
bool cf[8];
uint32_t fcsr0;
lbt_t lbt;
uint32_t cpucfg[21];

62
target/loongarch/kvm/kvm.c
View File

@ -477,6 +477,58 @@ static int kvm_loongarch_put_regs_fp(CPUState *cs)
return ret;
}
static int kvm_loongarch_put_lbt(CPUState *cs)
{
CPULoongArchState *env = cpu_env(cs);
uint64_t val;
int ret;
/* check whether vm support LBT firstly */
if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) {
return 0;
}
/* set six LBT registers including scr0-scr3, eflags, ftop */
ret = kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0);
ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1);
ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2);
ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3);
/*
* Be cautious, KVM_REG_LOONGARCH_LBT_FTOP is defined as 64-bit however
* lbt.ftop is 32-bit; the same with KVM_REG_LOONGARCH_LBT_EFLAGS register
*/
val = env->lbt.eflags;
ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val);
val = env->lbt.ftop;
ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val);
return ret;
}
static int kvm_loongarch_get_lbt(CPUState *cs)
{
CPULoongArchState *env = cpu_env(cs);
uint64_t val;
int ret;
/* check whether vm support LBT firstly */
if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) {
return 0;
}
/* get six LBT registers including scr0-scr3, eflags, ftop */
ret = kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0);
ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1);
ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2);
ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3);
ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val);
env->lbt.eflags = (uint32_t)val;
ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val);
env->lbt.ftop = (uint32_t)val;
return ret;
}
void kvm_arch_reset_vcpu(CPUState *cs)
{
CPULoongArchState *env = cpu_env(cs);
@ -613,6 +665,11 @@ int kvm_arch_get_registers(CPUState *cs, Error **errp)
return ret;
}
ret = kvm_loongarch_get_lbt(cs);
if (ret) {
return ret;
}
ret = kvm_loongarch_get_mpstate(cs);
return ret;
}
@ -641,6 +698,11 @@ int kvm_arch_put_registers(CPUState *cs, int level, Error **errp)
return ret;
}
ret = kvm_loongarch_put_lbt(cs);
if (ret) {
return ret;
}
ret = kvm_loongarch_put_mpstate(cs);
return ret;
}

24
target/loongarch/machine.c
View File

@ -110,6 +110,29 @@ static const VMStateDescription vmstate_lasx = {
},
};
static bool lbt_needed(void *opaque)
{
LoongArchCPU *cpu = opaque;
return !!FIELD_EX64(cpu->env.cpucfg[2], CPUCFG2, LBT_ALL);
}
static const VMStateDescription vmstate_lbt = {
.name = "cpu/lbt",
.version_id = 0,
.minimum_version_id = 0,
.needed = lbt_needed,
.fields = (const VMStateField[]) {
VMSTATE_UINT64(env.lbt.scr0, LoongArchCPU),
VMSTATE_UINT64(env.lbt.scr1, LoongArchCPU),
VMSTATE_UINT64(env.lbt.scr2, LoongArchCPU),
VMSTATE_UINT64(env.lbt.scr3, LoongArchCPU),
VMSTATE_UINT32(env.lbt.eflags, LoongArchCPU),
VMSTATE_UINT32(env.lbt.ftop, LoongArchCPU),
VMSTATE_END_OF_LIST()
},
};
#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
static bool tlb_needed(void *opaque)
{
@ -219,6 +242,7 @@ const VMStateDescription vmstate_loongarch_cpu = {
#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
&vmstate_tlb,
#endif
&vmstate_lbt,
NULL
}
};