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arm: Fix gic_irq_state.level bitfield type 

Found while cleaning up compiler warnings: GIC_*_LEVEL macros strongly
suggest that gic_irq_state.level is intended to be per-CPU and not just
a single, global bit. I'm unable to test the effect, but it seems to be
the most reasonable fix for the apparent brokenness.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6765 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2009-03-07 21:47:53 +00:00
parent 2701dfd2d0
commit a45db6c6fd
1 changed files with 1 additions and 1 deletions
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2
hw/arm_gic.c
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@ -39,7 +39,7 @@ typedef struct gic_irq_state
unsigned enabled:1; unsigned enabled:1;
unsigned pending:NCPU; unsigned pending:NCPU;
unsigned active:NCPU; unsigned active:NCPU;
unsigned level:1; unsigned level:NCPU;
unsigned model:1; /* 0 = N:N, 1 = 1:N */ unsigned model:1; /* 0 = N:N, 1 = 1:N */
unsigned trigger:1; /* nonzero = edge triggered. */ unsigned trigger:1; /* nonzero = edge triggered. */
} gic_irq_state; } gic_irq_state;