ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

ppc_booke: Pass PowerPCCPU to ppc_booke_timers_init() 

Cleans up after passing PowerPCCPU to timer callbacks.

Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2012-12-01 04:43:18 +01:00
parent 2f9859fb49
commit a34a92b9ec
6 changed files with 7 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
hw/ppc.h
View File

@ -89,4 +89,4 @@ enum {
#define PPC_SERIAL_MM_BAUDBASE 399193 #define PPC_SERIAL_MM_BAUDBASE 399193
/* ppc_booke.c */ /* ppc_booke.c */
void ppc_booke_timers_init(CPUPPCState *env, uint32_t freq, uint32_t flags); void ppc_booke_timers_init(PowerPCCPU *cpu, uint32_t freq, uint32_t flags);

2
hw/ppc/e500.c
View File

@ -495,7 +495,7 @@ void ppce500_init(PPCE500Params *params)
env->mpic_cpu_base = MPC8544_CCSRBAR_BASE + env->mpic_cpu_base = MPC8544_CCSRBAR_BASE +
MPC8544_MPIC_REGS_OFFSET + 0x20000; MPC8544_MPIC_REGS_OFFSET + 0x20000;
ppc_booke_timers_init(env, 400000000, PPC_TIMER_E500); ppc_booke_timers_init(cpu, 400000000, PPC_TIMER_E500);
/* Register reset handler */ /* Register reset handler */
if (!i) { if (!i) {

2
hw/ppc405_uc.c
View File

@ -2482,7 +2482,7 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem,
/* OBP arbitrer */ /* OBP arbitrer */
ppc4xx_opba_init(0xef600600); ppc4xx_opba_init(0xef600600);
/* Initialize timers */ /* Initialize timers */
ppc_booke_timers_init(env, sysclk, 0); ppc_booke_timers_init(cpu, sysclk, 0);
/* Universal interrupt controller */ /* Universal interrupt controller */
irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB); irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
irqs[PPCUIC_OUTPUT_INT] = irqs[PPCUIC_OUTPUT_INT] =

2
hw/ppc440_bamboo.c
View File

@ -195,7 +195,7 @@ static void bamboo_init(QEMUMachineInitArgs *args)
env = &cpu->env; env = &cpu->env;
qemu_register_reset(main_cpu_reset, cpu); qemu_register_reset(main_cpu_reset, cpu);
ppc_booke_timers_init(env, 400000000, 0); ppc_booke_timers_init(cpu, 400000000, 0);
ppc_dcr_init(env, NULL, NULL); ppc_dcr_init(env, NULL, NULL);
/* interrupt controller */ /* interrupt controller */

5
hw/ppc_booke.c
View File

@ -237,16 +237,15 @@ void store_booke_tcr(CPUPPCState *env, target_ulong val)
} }
void ppc_booke_timers_init(CPUPPCState *env, uint32_t freq, uint32_t flags) void ppc_booke_timers_init(PowerPCCPU *cpu, uint32_t freq, uint32_t flags)
{ {
PowerPCCPU *cpu = ppc_env_get_cpu(env);
ppc_tb_t *tb_env; ppc_tb_t *tb_env;
booke_timer_t *booke_timer; booke_timer_t *booke_timer;
tb_env = g_malloc0(sizeof(ppc_tb_t)); tb_env = g_malloc0(sizeof(ppc_tb_t));
booke_timer = g_malloc0(sizeof(booke_timer_t)); booke_timer = g_malloc0(sizeof(booke_timer_t));
env->tb_env = tb_env; cpu->env.tb_env = tb_env;
tb_env->flags = flags | PPC_TIMER_BOOKE | PPC_DECR_ZERO_TRIGGERED; tb_env->flags = flags | PPC_TIMER_BOOKE | PPC_DECR_ZERO_TRIGGERED;
tb_env->tb_freq = freq; tb_env->tb_freq = freq;

2
hw/virtex_ml507.c
View File

@ -94,7 +94,7 @@ static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
} }
env = &cpu->env; env = &cpu->env;
ppc_booke_timers_init(env, sysclk, 0/* no flags */); ppc_booke_timers_init(cpu, sysclk, 0/* no flags */);
ppc_dcr_init(env, NULL, NULL); ppc_dcr_init(env, NULL, NULL);