mirror of https://github.com/xemu-project/xemu.git
target/ppc: Suppress single step interrupts on rfi-type instructions
BookS does not take single step interrupts on completion of rfi and similar (rfid, hrfid, rfscv). This is not a completely clean way to do it, but in general non-branch instructions that change NIP on completion are excluded. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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@ -336,7 +336,7 @@ static void gen_ppc_maybe_interrupt(DisasContext *ctx)
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* The exception can be either POWERPC_EXCP_TRACE (on most PowerPCs) or
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* The exception can be either POWERPC_EXCP_TRACE (on most PowerPCs) or
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* POWERPC_EXCP_DEBUG (on BookE).
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* POWERPC_EXCP_DEBUG (on BookE).
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*/
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*/
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static void gen_debug_exception(DisasContext *ctx)
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static void gen_debug_exception(DisasContext *ctx, bool rfi_type)
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{
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{
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(CONFIG_USER_ONLY)
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if (ctx->flags & POWERPC_FLAG_DE) {
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if (ctx->flags & POWERPC_FLAG_DE) {
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@ -355,11 +355,13 @@ static void gen_debug_exception(DisasContext *ctx)
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tcg_constant_i32(POWERPC_EXCP_DEBUG));
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tcg_constant_i32(POWERPC_EXCP_DEBUG));
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ctx->base.is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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} else {
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} else {
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if (!rfi_type) { /* BookS does not single step rfi type instructions */
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TCGv t0 = tcg_temp_new();
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TCGv t0 = tcg_temp_new();
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tcg_gen_movi_tl(t0, ctx->cia);
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tcg_gen_movi_tl(t0, ctx->cia);
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gen_helper_book3s_trace(cpu_env, t0);
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gen_helper_book3s_trace(cpu_env, t0);
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ctx->base.is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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}
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}
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}
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#endif
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#endif
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}
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}
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@ -7410,6 +7412,8 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
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/* Honor single stepping. */
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/* Honor single stepping. */
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if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP)) {
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if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP)) {
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bool rfi_type = false;
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switch (is_jmp) {
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switch (is_jmp) {
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case DISAS_TOO_MANY:
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case DISAS_TOO_MANY:
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case DISAS_EXIT_UPDATE:
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case DISAS_EXIT_UPDATE:
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@ -7418,12 +7422,19 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
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break;
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break;
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case DISAS_EXIT:
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case DISAS_EXIT:
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case DISAS_CHAIN:
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case DISAS_CHAIN:
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/*
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* This is a heuristic, to put it kindly. The rfi class of
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* instructions are among the few outside branches that change
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* NIP without taking an interrupt. Single step trace interrupts
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* do not fire on completion of these instructions.
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*/
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rfi_type = true;
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break;
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break;
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default:
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default:
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g_assert_not_reached();
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g_assert_not_reached();
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}
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}
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gen_debug_exception(ctx);
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gen_debug_exception(ctx, rfi_type);
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return;
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return;
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}
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}
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