mirror of https://github.com/xemu-project/xemu.git
target/i386: cpu_load_eflags already sets cc_op
No need to set it again at the end of the translation block, cc_op_dirty can be set to false. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1883,7 +1883,7 @@ static void gen_IRET(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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gen_helper_iret_protected(tcg_env, tcg_constant_i32(s->dflag - 1),
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eip_next_i32(s));
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}
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set_cc_op(s, CC_OP_EFLAGS);
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assume_cc_op(s, CC_OP_EFLAGS);
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s->base.is_jmp = DISAS_EOB_ONLY;
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}
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@ -309,7 +309,7 @@ static const uint8_t cc_op_live[CC_OP_NB] = {
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[CC_OP_POPCNT] = USES_CC_SRC,
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};
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static void set_cc_op(DisasContext *s, CCOp op)
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static void set_cc_op_1(DisasContext *s, CCOp op, bool dirty)
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{
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int dead;
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@ -332,20 +332,27 @@ static void set_cc_op(DisasContext *s, CCOp op)
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tcg_gen_discard_tl(s->cc_srcT);
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}
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if (op == CC_OP_DYNAMIC) {
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/* The DYNAMIC setting is translator only, and should never be
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stored. Thus we always consider it clean. */
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s->cc_op_dirty = false;
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} else {
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/* Discard any computed CC_OP value (see shifts). */
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if (s->cc_op == CC_OP_DYNAMIC) {
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tcg_gen_discard_i32(cpu_cc_op);
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}
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s->cc_op_dirty = true;
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if (dirty && s->cc_op == CC_OP_DYNAMIC) {
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tcg_gen_discard_i32(cpu_cc_op);
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}
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s->cc_op_dirty = dirty;
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s->cc_op = op;
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}
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static void set_cc_op(DisasContext *s, CCOp op)
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{
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/*
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* The DYNAMIC setting is translator only, everything else
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* will be spilled later.
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*/
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set_cc_op_1(s, op, op != CC_OP_DYNAMIC);
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}
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static void assume_cc_op(DisasContext *s, CCOp op)
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{
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set_cc_op_1(s, op, false);
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}
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static void gen_update_cc_op(DisasContext *s)
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{
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if (s->cc_op_dirty) {
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@ -3554,6 +3561,10 @@ static void disas_insn_old(DisasContext *s, CPUState *cpu, int b)
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gen_update_cc_op(s);
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gen_update_eip_cur(s);
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gen_helper_syscall(tcg_env, cur_insn_len_i32(s));
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/* condition codes are modified only in long mode */
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if (LMA(s)) {
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assume_cc_op(s, CC_OP_EFLAGS);
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}
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/* TF handling for the syscall insn is different. The TF bit is checked
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after the syscall insn completes. This allows #DB to not be
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generated after one has entered CPL0 if TF is set in FMASK. */
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@ -3570,7 +3581,7 @@ static void disas_insn_old(DisasContext *s, CPUState *cpu, int b)
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gen_helper_sysret(tcg_env, tcg_constant_i32(dflag - 1));
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/* condition codes are modified only in long mode */
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if (LMA(s)) {
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set_cc_op(s, CC_OP_EFLAGS);
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assume_cc_op(s, CC_OP_EFLAGS);
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}
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/* TF handling for the sysret insn is different. The TF bit is
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checked after the sysret insn completes. This allows #DB to be
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@ -4489,7 +4500,7 @@ static void disas_insn_old(DisasContext *s, CPUState *cpu, int b)
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g_assert_not_reached();
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#else
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gen_helper_rsm(tcg_env);
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set_cc_op(s, CC_OP_EFLAGS);
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assume_cc_op(s, CC_OP_EFLAGS);
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#endif /* CONFIG_USER_ONLY */
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s->base.is_jmp = DISAS_EOB_ONLY;
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break;
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