From 9fbaa364775a4a7a97526f41d17e4361e8280d55 Mon Sep 17 00:00:00 2001 From: Marcin Krzeminski Date: Wed, 30 Mar 2016 17:27:23 +0100 Subject: [PATCH] block: m25p80: Implemented FSR register Implements FSR register, it is used for busy waits. Signed-off-by: Marcin Krzeminski Reviewed-by: Peter Crosthwaite Message-id: 1458719789-29868-10-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell --- hw/block/m25p80.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index 1e615caab7..479d4c5f5c 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -103,6 +103,10 @@ typedef struct FlashPartInfo { #define NVCFG_LOWER_SEGMENT_MASK (1 << 1) #define CFG_UPPER_128MB_SEG_ENABLED 0x3 +/* Numonyx (Micron) Flag Status Register macros */ +#define FSR_4BYTE_ADDR_MODE_ENABLED 0x1 +#define FSR_FLASH_READY (1 << 7) + static const FlashPartInfo known_devices[] = { /* Atmel -- some are (confusingly) marketed as "DataFlash" */ { INFO("at25fs010", 0x1f6601, 0, 32 << 10, 4, ER_4K) }, @@ -242,6 +246,7 @@ typedef enum { WREN = 0x6, JEDEC_READ = 0x9f, BULK_ERASE = 0xc7, + READ_FSR = 0x70, READ = 0x03, READ4 = 0x13, @@ -690,6 +695,16 @@ static void decode_new_cmd(Flash *s, uint32_t value) s->state = STATE_READING_DATA; break; + case READ_FSR: + s->data[0] = FSR_FLASH_READY; + if (s->four_bytes_address_mode) { + s->data[0] |= FSR_4BYTE_ADDR_MODE_ENABLED; + } + s->pos = 0; + s->len = 1; + s->state = STATE_READING_DATA; + break; + case JEDEC_READ: DB_PRINT_L(0, "populated jedec code\n"); s->data[0] = (s->pi->jedec >> 16) & 0xff;