diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index 75ba7ed579..e34a26a0ef 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -45,11 +45,10 @@ static void riscv_harts_realize(DeviceState *dev, Error **errp) s->harts = g_new0(RISCVCPU, s->num_harts); for (n = 0; n < s->num_harts; n++) { - - object_initialize(&s->harts[n], sizeof(RISCVCPU), s->cpu_type); + object_initialize_child(OBJECT(s), "harts[*]", &s->harts[n], + sizeof(RISCVCPU), s->cpu_type, + &error_abort, NULL); s->harts[n].env.mhartid = n; - object_property_add_child(OBJECT(s), "harts[*]", OBJECT(&s->harts[n]), - &error_abort); qemu_register_reset(riscv_harts_cpu_reset, &s->harts[n]); object_property_set_bool(OBJECT(&s->harts[n]), true, "realized", &err); diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 8a8dbe1c00..4577d72037 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -105,9 +105,9 @@ static void riscv_sifive_e_init(MachineState *machine) int i; /* Initialize SoC */ - object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_E_SOC); - object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), - &error_abort); + object_initialize_child(OBJECT(machine), "soc", &s->soc, + sizeof(s->soc), TYPE_RISCV_E_SOC, + &error_abort, NULL); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort); @@ -139,9 +139,9 @@ static void riscv_sifive_e_soc_init(Object *obj) { SiFiveESoCState *s = RISCV_E_SOC(obj); - object_initialize(&s->cpus, sizeof(s->cpus), TYPE_RISCV_HART_ARRAY); - object_property_add_child(obj, "cpus", OBJECT(&s->cpus), - &error_abort); + object_initialize_child(obj, "cpus", &s->cpus, + sizeof(s->cpus), TYPE_RISCV_HART_ARRAY, + &error_abort, NULL); object_property_set_str(OBJECT(&s->cpus), SIFIVE_E_CPU, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->cpus), smp_cpus, "num-harts", diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 3a6ffeb437..59ae1ce24a 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -244,9 +244,9 @@ static void riscv_sifive_u_init(MachineState *machine) int i; /* Initialize SoC */ - object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_U_SOC); - object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), - &error_abort); + object_initialize_child(OBJECT(machine), "soc", &s->soc, + sizeof(s->soc), TYPE_RISCV_U_SOC, + &error_abort, NULL); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort); @@ -303,16 +303,15 @@ static void riscv_sifive_u_soc_init(Object *obj) { SiFiveUSoCState *s = RISCV_U_SOC(obj); - object_initialize(&s->cpus, sizeof(s->cpus), TYPE_RISCV_HART_ARRAY); - object_property_add_child(obj, "cpus", OBJECT(&s->cpus), - &error_abort); + object_initialize_child(obj, "cpus", &s->cpus, sizeof(s->cpus), + TYPE_RISCV_HART_ARRAY, &error_abort, NULL); object_property_set_str(OBJECT(&s->cpus), SIFIVE_U_CPU, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->cpus), smp_cpus, "num-harts", &error_abort); - object_initialize(&s->gem, sizeof(s->gem), TYPE_CADENCE_GEM); - qdev_set_parent_bus(DEVICE(&s->gem), sysbus_get_default()); + sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem), + TYPE_CADENCE_GEM); } static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index f94e2b6707..c8c056c50b 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -171,9 +171,8 @@ static void spike_v1_10_0_board_init(MachineState *machine) int i; /* Initialize SOC */ - object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_HART_ARRAY); - object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), - &error_abort); + object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), + TYPE_RISCV_HART_ARRAY, &error_abort, NULL); object_property_set_str(OBJECT(&s->soc), SPIKE_V1_10_0_CPU, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", @@ -254,9 +253,8 @@ static void spike_v1_09_1_board_init(MachineState *machine) int i; /* Initialize SOC */ - object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_HART_ARRAY); - object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), - &error_abort); + object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), + TYPE_RISCV_HART_ARRAY, &error_abort, NULL); object_property_set_str(OBJECT(&s->soc), SPIKE_V1_09_1_CPU, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index aeada2498d..248bbdffd3 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -274,9 +274,8 @@ static void riscv_virt_board_init(MachineState *machine) void *fdt; /* Initialize SOC */ - object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_HART_ARRAY); - object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), - &error_abort); + object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), + TYPE_RISCV_HART_ARRAY, &error_abort, NULL); object_property_set_str(OBJECT(&s->soc), VIRT_CPU, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts",