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target-i386: Fix mulx for identical target regs 

The Intel specification clearly indicates that the low part
of the result is written first and the high part of the result
is written second; thus if ModRM:reg and VEX.vvvv are identical,
the final result should be the high part of the result.

At present, TCG may either produce incorrect results or crash
with --enable-checking.

Reported-by: Toni Nedialkov <farmdve@gmail.com>
Reported-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
This commit is contained in:
Richard Henderson 2015-11-17 12:41:47 +01:00 committed by Eduardo Habkost
parent 9be060f527
commit 9ecac5dad1
1 changed files with 3 additions and 1 deletions
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4
target-i386/translate.c
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@ -3848,8 +3848,10 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
break;
#ifdef TARGET_X86_64
case MO_64:
tcg_gen_mulu2_i64(cpu_regs[s->vex_v], cpu_regs[reg],
tcg_gen_mulu2_i64(cpu_T[0], cpu_T[1],
cpu_T[0], cpu_regs[R_EDX]);
tcg_gen_mov_i64(cpu_regs[s->vex_v], cpu_T[0]);
tcg_gen_mov_i64(cpu_regs[reg], cpu_T[1]);
break;
#endif
}