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target/mips: Inline cpu_state_reset() in mips_cpu_reset() 

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201214183739.500368-2-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2020-12-14 15:07:13 +01:00
parent 2e211e0a12
commit 9bcd41d41f
1 changed files with 9 additions and 17 deletions
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26
target/mips/cpu.c
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@ -105,10 +105,16 @@ static bool mips_cpu_has_work(CPUState *cs)
#include "translate_init.c.inc" #include "translate_init.c.inc"
/* TODO QOM'ify CPU reset and remove */ static void mips_cpu_reset(DeviceState *dev)
static void cpu_state_reset(CPUMIPSState *env)
{ {
CPUState *cs = env_cpu(env); CPUState *cs = CPU(dev);
MIPSCPU *cpu = MIPS_CPU(cs);
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(cpu);
CPUMIPSState *env = &cpu->env;
mcc->parent_reset(dev);
memset(env, 0, offsetof(CPUMIPSState, end_reset_fields));
/* Reset registers to their default values */ /* Reset registers to their default values */
env->CP0_PRid = env->cpu_model->CP0_PRid; env->CP0_PRid = env->cpu_model->CP0_PRid;
@ -331,20 +337,6 @@ static void cpu_state_reset(CPUMIPSState *env)
/* UHI interface can be used to obtain argc and argv */ /* UHI interface can be used to obtain argc and argv */
env->active_tc.gpr[4] = -1; env->active_tc.gpr[4] = -1;
} }
}
static void mips_cpu_reset(DeviceState *dev)
{
CPUState *s = CPU(dev);
MIPSCPU *cpu = MIPS_CPU(s);
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(cpu);
CPUMIPSState *env = &cpu->env;
mcc->parent_reset(dev);
memset(env, 0, offsetof(CPUMIPSState, end_reset_fields));
cpu_state_reset(env);
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
if (kvm_enabled()) { if (kvm_enabled()) {