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target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions
Implements the following PowerISA v3.1 instructions: setbc: Set Boolean Condition setbcr: Set Boolean Condition Reverse setnbc: Set Negative Boolean Condition setnbcr: Set Negative Boolean Condition Reverse Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210601193528.2533031-11-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -26,6 +26,9 @@
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&X rt ra rb
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@X ...... rt:5 ra:5 rb:5 .......... . &X
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&X_bi rt bi
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@X_bi ...... rt:5 bi:5 ----- .......... - &X_bi
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### Fixed-Point Load Instructions
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LBZ 100010 ..... ..... ................ @D
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@ -83,3 +86,10 @@ STDUX 011111 ..... ..... ..... 0010110101 - @X
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ADDI 001110 ..... ..... ................ @D
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ADDIS 001111 ..... ..... ................ @D
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### Move To/From System Register Instructions
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SETBC 011111 ..... ..... ----- 0110000000 - @X_bi
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SETBCR 011111 ..... ..... ----- 0110100000 - @X_bi
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SETNBC 011111 ..... ..... ----- 0111000000 - @X_bi
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SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi
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@ -204,3 +204,26 @@ static bool trans_PNOP(DisasContext *ctx, arg_PNOP *a)
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{
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return true;
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}
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static bool do_set_bool_cond(DisasContext *ctx, arg_X_bi *a, bool neg, bool rev)
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{
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REQUIRE_INSNS_FLAGS2(ctx, ISA310);
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uint32_t mask = 0x08 >> (a->bi & 0x03);
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TCGCond cond = rev ? TCG_COND_EQ : TCG_COND_NE;
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TCGv temp = tcg_temp_new();
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tcg_gen_extu_i32_tl(temp, cpu_crf[a->bi >> 2]);
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tcg_gen_andi_tl(temp, temp, mask);
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tcg_gen_setcondi_tl(cond, cpu_gpr[a->rt], temp, 0);
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if (neg) {
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tcg_gen_neg_tl(cpu_gpr[a->rt], cpu_gpr[a->rt]);
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}
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tcg_temp_free(temp);
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return true;
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}
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TRANS(SETBC, do_set_bool_cond, false, false)
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TRANS(SETBCR, do_set_bool_cond, false, true)
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TRANS(SETNBC, do_set_bool_cond, true, false)
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TRANS(SETNBCR, do_set_bool_cond, true, true)
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