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target/riscv: Simplify getting RISCVCPU pointer from env 

Use env_archcpu() to get RISCVCPU pointer from env directly.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230309071329.45932-3-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Weiwei Li 2023-03-09 15:13:27 +08:00 committed by Alistair Francis
parent 662ed9cc85
commit 99c2f5c42a
1 changed files with 4 additions and 4 deletions
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8
target/riscv/pmu.c
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@ -223,7 +223,7 @@ bool riscv_pmu_ctr_monitor_instructions(CPURISCVState *env,
return true; return true;
} }
cpu = RISCV_CPU(env_cpu(env)); cpu = env_archcpu(env);
if (!cpu->pmu_event_ctr_map) { if (!cpu->pmu_event_ctr_map) {
return false; return false;
} }
@ -249,7 +249,7 @@ bool riscv_pmu_ctr_monitor_cycles(CPURISCVState *env, uint32_t target_ctr)
return true; return true;
} }
cpu = RISCV_CPU(env_cpu(env)); cpu = env_archcpu(env);
if (!cpu->pmu_event_ctr_map) { if (!cpu->pmu_event_ctr_map) {
return false; return false;
} }
@ -289,7 +289,7 @@ int riscv_pmu_update_event_map(CPURISCVState *env, uint64_t value,
uint32_t ctr_idx) uint32_t ctr_idx)
{ {
uint32_t event_idx; uint32_t event_idx;
RISCVCPU *cpu = RISCV_CPU(env_cpu(env)); RISCVCPU *cpu = env_archcpu(env);
if (!riscv_pmu_counter_valid(cpu, ctr_idx) || !cpu->pmu_event_ctr_map) { if (!riscv_pmu_counter_valid(cpu, ctr_idx) || !cpu->pmu_event_ctr_map) {
return -1; return -1;
@ -390,7 +390,7 @@ int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value, uint32_t ctr_idx)
{ {
uint64_t overflow_delta, overflow_at; uint64_t overflow_delta, overflow_at;
int64_t overflow_ns, overflow_left = 0; int64_t overflow_ns, overflow_left = 0;
RISCVCPU *cpu = RISCV_CPU(env_cpu(env)); RISCVCPU *cpu = env_archcpu(env);
PMUCTRState *counter = &env->pmu_ctrs[ctr_idx]; PMUCTRState *counter = &env->pmu_ctrs[ctr_idx];
if (!riscv_pmu_counter_valid(cpu, ctr_idx) || !cpu->cfg.ext_sscofpmf) { if (!riscv_pmu_counter_valid(cpu, ctr_idx) || !cpu->cfg.ext_sscofpmf) {