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mac_newworld: simplify IRQ wiring 

The OpenPIC have 5 outputs per connected CPU. The machine init code hence
needs a bi-dimensional array (smp_cpu lines, 5 columns) to wire up the irqs
between the PIC and the CPUs.

The current code first allocates an array of smp_cpus pointers to qemu_irq
type, then it allocates another array of smp_cpus * 5 qemu_irq and fills the
first array with pointers to each line of the second array. This is rather
convoluted.

Simplify the logic by introducing a structured type that describes all the
OpenPIC outputs for a single CPU, ie, fixed size of 5 qemu_irq, and only
allocate a smp_cpu sized array of those.

This also allows to use g_new(T, n) instead of g_malloc(sizeof(T) * n)
as recommended in HACKING.

Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Greg Kurz 2018-11-27 14:06:22 +01:00 committed by David Gibson
parent 57aa218818
commit 9929301ee1
2 changed files with 15 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
hw/ppc/mac_newworld.c
View File

@ -115,7 +115,7 @@ static void ppc_core99_init(MachineState *machine)
PowerPCCPU *cpu = NULL; PowerPCCPU *cpu = NULL;
CPUPPCState *env = NULL; CPUPPCState *env = NULL;
char *filename; char *filename;
qemu_irq **openpic_irqs; IrqLines *openpic_irqs;
int linux_boot, i, j, k; int linux_boot, i, j, k;
MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1); MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
hwaddr kernel_base, initrd_base, cmdline_base = 0; hwaddr kernel_base, initrd_base, cmdline_base = 0;
@ -248,41 +248,37 @@ static void ppc_core99_init(MachineState *machine)
memory_region_add_subregion(get_system_memory(), 0xf8000000, memory_region_add_subregion(get_system_memory(), 0xf8000000,
sysbus_mmio_get_region(s, 0)); sysbus_mmio_get_region(s, 0));
openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *)); openpic_irqs = g_new0(IrqLines, smp_cpus);
openpic_irqs[0] =
g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
for (i = 0; i < smp_cpus; i++) { for (i = 0; i < smp_cpus; i++) {
/* Mac99 IRQ connection between OpenPIC outputs pins /* Mac99 IRQ connection between OpenPIC outputs pins
* and PowerPC input pins * and PowerPC input pins
*/ */
switch (PPC_INPUT(env)) { switch (PPC_INPUT(env)) {
case PPC_FLAGS_INPUT_6xx: case PPC_FLAGS_INPUT_6xx:
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
openpic_irqs[i][OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_CINT] = openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_MCK] = openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
/* Not connected ? */ /* Not connected ? */
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */ /* Check this */
openpic_irqs[i][OPENPIC_OUTPUT_RESET] = openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
break; break;
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
case PPC_FLAGS_INPUT_970: case PPC_FLAGS_INPUT_970:
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
openpic_irqs[i][OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_CINT] = openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_MCK] = openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
/* Not connected ? */ /* Not connected ? */
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */ /* Check this */
openpic_irqs[i][OPENPIC_OUTPUT_RESET] = openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
break; break;
#endif /* defined(TARGET_PPC64) */ #endif /* defined(TARGET_PPC64) */
@ -299,7 +295,7 @@ static void ppc_core99_init(MachineState *machine)
k = 0; k = 0;
for (i = 0; i < smp_cpus; i++) { for (i = 0; i < smp_cpus; i++) {
for (j = 0; j < OPENPIC_OUTPUT_NB; j++) { for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
sysbus_connect_irq(s, k++, openpic_irqs[i][j]); sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
} }
} }
g_free(openpic_irqs); g_free(openpic_irqs);

2
include/hw/ppc/openpic.h
View File

@ -20,6 +20,8 @@ enum {
OPENPIC_OUTPUT_NB, OPENPIC_OUTPUT_NB,
}; };
typedef struct IrqLines { qemu_irq irq[OPENPIC_OUTPUT_NB]; } IrqLines;
#define OPENPIC_MODEL_RAVEN 0 #define OPENPIC_MODEL_RAVEN 0
#define OPENPIC_MODEL_FSL_MPIC_20 1 #define OPENPIC_MODEL_FSL_MPIC_20 1
#define OPENPIC_MODEL_FSL_MPIC_42 2 #define OPENPIC_MODEL_FSL_MPIC_42 2