Two fixes for the 68040 FPU

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Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-5.1-pull-request' into staging

Two fixes for the 68040 FPU

# gpg: Signature made Tue 02 Jun 2020 16:21:19 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-5.1-pull-request:
  target/m68k: implement opcode fetoxm1
  target/m68k: implement fmove.l #<data>,FPCR

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-06-02 16:25:26 +01:00
commit 98d59d5dd8
3 changed files with 23 additions and 0 deletions

View File

@ -641,6 +641,11 @@ void HELPER(fatanh)(CPUM68KState *env, FPReg *res, FPReg *val)
res->d = floatx80_atanh(val->d, &env->fp_status);
}
void HELPER(fetoxm1)(CPUM68KState *env, FPReg *res, FPReg *val)
{
res->d = floatx80_etoxm1(val->d, &env->fp_status);
}
void HELPER(ftanh)(CPUM68KState *env, FPReg *res, FPReg *val)
{
res->d = floatx80_tanh(val->d, &env->fp_status);

View File

@ -83,6 +83,7 @@ DEF_HELPER_3(fatan, void, env, fp, fp)
DEF_HELPER_3(fasin, void, env, fp, fp)
DEF_HELPER_3(facos, void, env, fp, fp)
DEF_HELPER_3(fatanh, void, env, fp, fp)
DEF_HELPER_3(fetoxm1, void, env, fp, fp)
DEF_HELPER_3(ftanh, void, env, fp, fp)
DEF_HELPER_3(fsinh, void, env, fp, fp)
DEF_HELPER_3(fcosh, void, env, fp, fp)

View File

@ -4936,6 +4936,20 @@ static void gen_op_fmove_fcr(CPUM68KState *env, DisasContext *s,
gen_store_fcr(s, AREG(insn, 0), mask);
}
return;
case 7: /* Immediate */
if (REG(insn, 0) == 4) {
if (is_write ||
(mask != M68K_FPIAR && mask != M68K_FPSR &&
mask != M68K_FPCR)) {
gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
return;
}
tmp = tcg_const_i32(read_im32(env, s));
gen_store_fcr(s, tmp, mask);
tcg_temp_free(tmp);
return;
}
break;
default:
break;
}
@ -5146,6 +5160,9 @@ DISAS_INSN(fpu)
case 0x06: /* flognp1 */
gen_helper_flognp1(cpu_env, cpu_dest, cpu_src);
break;
case 0x08: /* fetoxm1 */
gen_helper_fetoxm1(cpu_env, cpu_dest, cpu_src);
break;
case 0x09: /* ftanh */
gen_helper_ftanh(cpu_env, cpu_dest, cpu_src);
break;