mirror of https://github.com/xemu-project/xemu.git
microblaze: Make the MSR PVR bit non writable
Instead of hardcoding it to 1. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
This commit is contained in:
parent
01e0451a08
commit
97b833c5df
|
@ -424,10 +424,15 @@ static inline void msr_read(DisasContext *dc, TCGv d)
|
||||||
|
|
||||||
static inline void msr_write(DisasContext *dc, TCGv v)
|
static inline void msr_write(DisasContext *dc, TCGv v)
|
||||||
{
|
{
|
||||||
|
TCGv t;
|
||||||
|
|
||||||
|
t = tcg_temp_new();
|
||||||
dc->cpustate_changed = 1;
|
dc->cpustate_changed = 1;
|
||||||
tcg_gen_mov_tl(cpu_SR[SR_MSR], v);
|
/* PVR bit is not writable. */
|
||||||
/* PVR, we have a processor version register. */
|
tcg_gen_andi_tl(t, v, ~(1 << 10));
|
||||||
tcg_gen_ori_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], (1 << 10));
|
tcg_gen_andi_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], (1 << 10));
|
||||||
|
tcg_gen_or_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], v);
|
||||||
|
tcg_temp_free(t);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void dec_msr(DisasContext *dc)
|
static void dec_msr(DisasContext *dc)
|
||||||
|
|
Loading…
Reference in New Issue