mirror of https://github.com/xemu-project/xemu.git
tcg/i386: Implement negsetcond_*
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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e91f015b62
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@ -1529,7 +1529,7 @@ static void tcg_out_brcond2(TCGContext *s, const TCGArg *args,
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static void tcg_out_setcond(TCGContext *s, int rexw, TCGCond cond,
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static void tcg_out_setcond(TCGContext *s, int rexw, TCGCond cond,
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TCGArg dest, TCGArg arg1, TCGArg arg2,
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TCGArg dest, TCGArg arg1, TCGArg arg2,
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int const_arg2)
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int const_arg2, bool neg)
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{
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{
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bool inv = false;
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bool inv = false;
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bool cleared;
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bool cleared;
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@ -1570,11 +1570,18 @@ static void tcg_out_setcond(TCGContext *s, int rexw, TCGCond cond,
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* This is always smaller than the SETCC expansion.
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* This is always smaller than the SETCC expansion.
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*/
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*/
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tcg_out_cmp(s, arg1, arg2, const_arg2, rexw);
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tcg_out_cmp(s, arg1, arg2, const_arg2, rexw);
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tgen_arithr(s, ARITH_SBB, dest, dest); /* T:-1 F:0 */
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if (inv) {
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/* X - X - C = -C = (C ? -1 : 0) */
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tgen_arithi(s, ARITH_ADD, dest, 1, 0); /* T:0 F:1 */
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tgen_arithr(s, ARITH_SBB + (neg ? rexw : 0), dest, dest);
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} else {
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if (inv && neg) {
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tcg_out_modrm(s, OPC_GRP3_Ev, EXT3_NEG, dest); /* T:1 F:0 */
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/* ~(C ? -1 : 0) = (C ? 0 : -1) */
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tcg_out_modrm(s, OPC_GRP3_Ev + rexw, EXT3_NOT, dest);
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} else if (inv) {
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/* (C ? -1 : 0) + 1 = (C ? 0 : 1) */
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tgen_arithi(s, ARITH_ADD, dest, 1, 0);
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} else if (!neg) {
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/* -(C ? -1 : 0) = (C ? 1 : 0) */
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tcg_out_modrm(s, OPC_GRP3_Ev, EXT3_NEG, dest);
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}
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}
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return;
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return;
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@ -1588,7 +1595,8 @@ static void tcg_out_setcond(TCGContext *s, int rexw, TCGCond cond,
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if (inv) {
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if (inv) {
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tcg_out_modrm(s, OPC_GRP3_Ev + rexw, EXT3_NOT, dest);
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tcg_out_modrm(s, OPC_GRP3_Ev + rexw, EXT3_NOT, dest);
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}
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}
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tcg_out_shifti(s, SHIFT_SHR + rexw, dest, rexw ? 63 : 31);
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tcg_out_shifti(s, (neg ? SHIFT_SAR : SHIFT_SHR) + rexw,
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dest, rexw ? 63 : 31);
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return;
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return;
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}
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}
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break;
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break;
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@ -1614,6 +1622,9 @@ static void tcg_out_setcond(TCGContext *s, int rexw, TCGCond cond,
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if (!cleared) {
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if (!cleared) {
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tcg_out_ext8u(s, dest, dest);
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tcg_out_ext8u(s, dest, dest);
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}
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}
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if (neg) {
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tcg_out_modrm(s, OPC_GRP3_Ev + rexw, EXT3_NEG, dest);
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}
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}
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}
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#if TCG_TARGET_REG_BITS == 32
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#if TCG_TARGET_REG_BITS == 32
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@ -2632,7 +2643,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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arg_label(args[3]), 0);
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arg_label(args[3]), 0);
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break;
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break;
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OP_32_64(setcond):
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OP_32_64(setcond):
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tcg_out_setcond(s, rexw, args[3], a0, a1, a2, const_a2);
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tcg_out_setcond(s, rexw, args[3], a0, a1, a2, const_a2, false);
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break;
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OP_32_64(negsetcond):
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tcg_out_setcond(s, rexw, args[3], a0, a1, a2, const_a2, true);
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break;
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break;
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OP_32_64(movcond):
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OP_32_64(movcond):
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tcg_out_movcond(s, rexw, args[5], a0, a1, a2, const_a2, args[3]);
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tcg_out_movcond(s, rexw, args[5], a0, a1, a2, const_a2, args[3]);
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@ -3377,6 +3391,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
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case INDEX_op_setcond_i32:
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case INDEX_op_setcond_i32:
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case INDEX_op_setcond_i64:
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case INDEX_op_setcond_i64:
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case INDEX_op_negsetcond_i32:
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case INDEX_op_negsetcond_i64:
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return C_O1_I2(q, r, re);
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return C_O1_I2(q, r, re);
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case INDEX_op_movcond_i32:
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case INDEX_op_movcond_i32:
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@ -150,7 +150,7 @@ typedef enum {
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#define TCG_TARGET_HAS_sextract_i32 1
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#define TCG_TARGET_HAS_sextract_i32 1
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#define TCG_TARGET_HAS_extract2_i32 1
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#define TCG_TARGET_HAS_extract2_i32 1
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#define TCG_TARGET_HAS_movcond_i32 1
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#define TCG_TARGET_HAS_movcond_i32 1
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#define TCG_TARGET_HAS_negsetcond_i32 0
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#define TCG_TARGET_HAS_negsetcond_i32 1
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#define TCG_TARGET_HAS_add2_i32 1
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#define TCG_TARGET_HAS_add2_i32 1
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#define TCG_TARGET_HAS_sub2_i32 1
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#define TCG_TARGET_HAS_sub2_i32 1
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#define TCG_TARGET_HAS_mulu2_i32 1
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#define TCG_TARGET_HAS_mulu2_i32 1
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@ -187,7 +187,7 @@ typedef enum {
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#define TCG_TARGET_HAS_sextract_i64 0
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#define TCG_TARGET_HAS_sextract_i64 0
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#define TCG_TARGET_HAS_extract2_i64 1
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#define TCG_TARGET_HAS_extract2_i64 1
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#define TCG_TARGET_HAS_movcond_i64 1
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#define TCG_TARGET_HAS_movcond_i64 1
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#define TCG_TARGET_HAS_negsetcond_i64 0
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#define TCG_TARGET_HAS_negsetcond_i64 1
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#define TCG_TARGET_HAS_add2_i64 1
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#define TCG_TARGET_HAS_add2_i64 1
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#define TCG_TARGET_HAS_sub2_i64 1
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#define TCG_TARGET_HAS_sub2_i64 1
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#define TCG_TARGET_HAS_mulu2_i64 1
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#define TCG_TARGET_HAS_mulu2_i64 1
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