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target/i386: Improve bswap translation 

Use a break instead of an ifdefed else.
There's no need to move the values through s->T0.
Remove TCG_BSWAP_IZ and the preceding zero-extension.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-06-13 16:23:14 -07:00
parent ebdd503d45
commit 94fdf98721
1 changed files with 4 additions and 10 deletions
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14
target/i386/tcg/translate.c
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@ -7195,17 +7195,11 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
reg = (b & 7) | REX_B(s); reg = (b & 7) | REX_B(s);
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
if (dflag == MO_64) { if (dflag == MO_64) {
gen_op_mov_v_reg(s, MO_64, s->T0, reg); tcg_gen_bswap64_i64(cpu_regs[reg], cpu_regs[reg]);
tcg_gen_bswap64_i64(s->T0, s->T0); break;
gen_op_mov_reg_v(s, MO_64, reg, s->T0);
} else
#endif
{
gen_op_mov_v_reg(s, MO_32, s->T0, reg);
tcg_gen_ext32u_tl(s->T0, s->T0);
tcg_gen_bswap32_tl(s->T0, s->T0, TCG_BSWAP_IZ | TCG_BSWAP_OZ);
gen_op_mov_reg_v(s, MO_32, reg, s->T0);
} }
#endif
tcg_gen_bswap32_tl(cpu_regs[reg], cpu_regs[reg], TCG_BSWAP_OZ);
break; break;
case 0xd6: /* salc */ case 0xd6: /* salc */
if (CODE64(s)) if (CODE64(s))