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Convert references to logfile/loglevel to use qemu_log*() macros 

This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aliguori 2009-01-15 22:34:14 +00:00
parent 6cec548799
commit 93fcfe39a0
40 changed files with 293 additions and 469 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
block-raw-posix.c
View File

@ -67,8 +67,8 @@
//#define DEBUG_BLOCK
#if defined(DEBUG_BLOCK)
#define DEBUG_BLOCK_PRINT(formatCstr, args...) do { if (loglevel != 0) \
{ fprintf(logfile, formatCstr, ##args); fflush(logfile); } } while (0)
#define DEBUG_BLOCK_PRINT(formatCstr, args...) do { if (qemu_log_enabled()) \
{ qemu_log(formatCstr, ##args); fflush(logfile); } } while (0)
#else
#define DEBUG_BLOCK_PRINT(formatCstr, args...)
#endif

2
bsd-user/elfload.c
View File

@ -1456,7 +1456,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs,
free(elf_phdata);
if (loglevel)
if (qemu_log_enabled())
load_symbols(&elf_ex, bprm->fd);
if (interpreter_type != INTERPRETER_AOUT) close(bprm->fd);

26
bsd-user/main.c
View File

@ -533,21 +533,19 @@ int main(int argc, char **argv)
free(target_environ);
if (loglevel) {
page_dump(logfile);
log_page_dump();
fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
info->start_code);
fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
info->start_data);
fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
info->start_stack);
fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
}
qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
info->start_code);
qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
info->start_data);
qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
info->start_stack);
qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
target_set_brk(info->brk);
syscall_init();

33
cpu-exec.c
View File

@ -390,9 +390,7 @@ int cpu_exec(CPUState *env1)
svm_check_intercept(SVM_EXIT_INTR);
env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);
intno = cpu_get_pic_interrupt(env);
if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "Servicing hardware INT=0x%02x\n", intno);
}
qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);
do_interrupt(intno, 0, 0, 0, 1);
/* ensure that no TB jump will be modified as
the program flow was changed */
@ -405,8 +403,7 @@ int cpu_exec(CPUState *env1)
/* FIXME: this should respect TPR */
svm_check_intercept(SVM_EXIT_VINTR);
intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector));
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile, "Servicing virtual hardware INT=0x%02x\n", intno);
qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno);
do_interrupt(intno, 0, 0, 0, 1);
env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
next_tb = 0;
@ -540,28 +537,28 @@ int cpu_exec(CPUState *env1)
regs_to_env();
#if defined(TARGET_I386)
env->eflags = env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
log_cpu_state(env, X86_DUMP_CCOP);
env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
#elif defined(TARGET_ARM)
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#elif defined(TARGET_SPARC)
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#elif defined(TARGET_PPC)
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#elif defined(TARGET_M68K)
cpu_m68k_flush_flags(env, env->cc_op);
env->cc_op = CC_OP_FLAGS;
env->sr = (env->sr & 0xffe0)
| env->cc_dest | (env->cc_x << 4);
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#elif defined(TARGET_MIPS)
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#elif defined(TARGET_SH4)
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#elif defined(TARGET_ALPHA)
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#elif defined(TARGET_CRIS)
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#else
#error unsupported target CPU
#endif
@ -579,11 +576,9 @@ int cpu_exec(CPUState *env1)
tb_invalidated_flag = 0;
}
#ifdef DEBUG_EXEC
if ((loglevel & CPU_LOG_EXEC)) {
fprintf(logfile, "Trace 0x%08lx [" TARGET_FMT_lx "] %s\n",
(long)tb->tc_ptr, tb->pc,
lookup_symbol(tb->pc));
}
qemu_log_mask(CPU_LOG_EXEC, "Trace 0x%08lx [" TARGET_FMT_lx "] %s\n",
(long)tb->tc_ptr, tb->pc,
lookup_symbol(tb->pc));
#endif
/* see if we can patch the calling TB. When the TB
spans two pages, we cannot safely do a direct

4
darwin-user/commpage.c
View File

@ -35,9 +35,9 @@
//#define DEBUG_COMMPAGE
#ifdef DEBUG_COMMPAGE
# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); printf(__VA_ARGS__); } while(0)
# define DPRINTF(...) do { qemu_log(__VA_ARGS__); printf(__VA_ARGS__); } while(0)
#else
# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); } while(0)
# define DPRINTF(...) do { qemu_log(__VA_ARGS__); } while(0)
#endif
/********************************************************************

4
darwin-user/machload.c
View File

@ -39,9 +39,9 @@
//#define DEBUG_MACHLOAD
#ifdef DEBUG_MACHLOAD
# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); printf(__VA_ARGS__); } while(0)
# define DPRINTF(...) do { qemu_log(__VA_ARGS__); printf(__VA_ARGS__); } while(0)
#else
# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); } while(0)
# define DPRINTF(...) do { qemu_log(__VA_ARGS__); } while(0)
#endif
# define check_mach_header(x) (x.magic == MH_CIGAM)

6
darwin-user/main.c
View File

@ -160,10 +160,8 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
do { \
fprintf(stderr, fmt , ##args); \
cpu_dump_state(env, stderr, fprintf, 0); \
if (loglevel != 0) { \
fprintf(logfile, fmt , ##args); \
cpu_dump_state(env, logfile, fprintf, 0); \
} \
qemu_log(fmt, ##args); \
log_cpu_state(env, 0); \
} while (0)
void cpu_loop(CPUPPCState *env)

4
darwin-user/syscall.c
View File

@ -69,7 +69,7 @@
# define DEBUG_ENABLE_ALL() static int __DEBUG_qemu_user_force_enable = 1
DEBUG_ENABLE_ALL();
# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); \
# define DPRINTF(...) do { qemu_log(__VA_ARGS__); \
if(__DEBUG_qemu_user_force_enable) fprintf(stderr, __VA_ARGS__); \
} while(0)
#else
@ -77,7 +77,7 @@
# define DEBUG_BEGIN_ENABLE
# define DEBUG_END_ENABLE
# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); } while(0)
# define DPRINTF(...) do { qemu_log(__VA_ARGS__); } while(0)
#endif
enum {

24
exec.c
View File

@ -1004,12 +1004,10 @@ static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int le
int offset, b;
#if 0
if (1) {
if (loglevel) {
fprintf(logfile, "modifying code at 0x%x size=%d EIP=%x PC=%08x\n",
cpu_single_env->mem_io_vaddr, len,
cpu_single_env->eip,
cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base);
}
qemu_log("modifying code at 0x%x size=%d EIP=%x PC=%08x\n",
cpu_single_env->mem_io_vaddr, len,
cpu_single_env->eip,
cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base);
}
#endif
p = page_find(start >> TARGET_PAGE_BITS);
@ -1634,17 +1632,17 @@ void cpu_abort(CPUState *env, const char *fmt, ...)
#else
cpu_dump_state(env, stderr, fprintf, 0);
#endif
if (logfile) {
fprintf(logfile, "qemu: fatal: ");
vfprintf(logfile, fmt, ap2);
fprintf(logfile, "\n");
if (qemu_log_enabled()) {
qemu_log("qemu: fatal: ");
qemu_log_vprintf(fmt, ap2);
qemu_log("\n");
#ifdef TARGET_I386
cpu_dump_state(env, logfile, fprintf, X86_DUMP_FPU | X86_DUMP_CCOP);
log_cpu_state(env, X86_DUMP_FPU | X86_DUMP_CCOP);
#else
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#endif
fflush(logfile);
fclose(logfile);
qemu_log_close();
}
va_end(ap2);
va_end(ap);

15
hw/alpha_palcode.c
View File

@ -1061,13 +1061,11 @@ void call_pal (CPUState *env, int palcode)
{
target_long ret;
if (logfile != NULL)
fprintf(logfile, "%s: palcode %02x\n", __func__, palcode);
qemu_log("%s: palcode %02x\n", __func__, palcode);
switch (palcode) {
case 0x83:
/* CALLSYS */
if (logfile != NULL)
fprintf(logfile, "CALLSYS n " TARGET_FMT_ld "\n", env->ir[0]);
qemu_log("CALLSYS n " TARGET_FMT_ld "\n", env->ir[0]);
ret = do_syscall(env, env->ir[IR_V0], env->ir[IR_A0], env->ir[IR_A1],
env->ir[IR_A2], env->ir[IR_A3], env->ir[IR_A4],
env->ir[IR_A5]);
@ -1082,18 +1080,15 @@ void call_pal (CPUState *env, int palcode)
case 0x9E:
/* RDUNIQUE */
env->ir[IR_V0] = env->unique;
if (logfile != NULL)
fprintf(logfile, "RDUNIQUE: " TARGET_FMT_lx "\n", env->unique);
qemu_log("RDUNIQUE: " TARGET_FMT_lx "\n", env->unique);
break;
case 0x9F:
/* WRUNIQUE */
env->unique = env->ir[IR_A0];
if (logfile != NULL)
fprintf(logfile, "WRUNIQUE: " TARGET_FMT_lx "\n", env->unique);
qemu_log("WRUNIQUE: " TARGET_FMT_lx "\n", env->unique);
break;
default:
if (logfile != NULL)
fprintf(logfile, "%s: unhandled palcode %02x\n",
qemu_log("%s: unhandled palcode %02x\n",
__func__, palcode);
exit(1);
}

4
hw/mips_timer.c
View File

@ -84,9 +84,7 @@ static void mips_timer_cb (void *opaque)
env = opaque;
#if 0
if (logfile) {
fprintf(logfile, "%s\n", __func__);
}
qemu_log("%s\n", __func__);
#endif
if (env->CP0_Cause & (1 << CP0Ca_DC))

10
hw/ppc.c
View File

@ -32,20 +32,14 @@
//#define PPC_DEBUG_TB
#ifdef PPC_DEBUG_IRQ
# define LOG_IRQ(...) do { \
if (loglevel & CPU_LOG_INT) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_IRQ(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__)
#else
# define LOG_IRQ(...) do { } while (0)
#endif
#ifdef PPC_DEBUG_TB
# define LOG_TB(...) do { \
if (loglevel) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_TB(...) qemu_log(__VA_ARGS__)
#else
# define LOG_TB(...) do { } while (0)
#endif

5
hw/ppc4xx_devs.c
View File

@ -33,10 +33,7 @@
#ifdef DEBUG_UIC
# define LOG_UIC(...) do { \
if (loglevel & CPU_LOG_INT) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_UIC(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__)
#else
# define LOG_UIC(...) do { } while (0)
#endif

9
hw/ppc_prep.c
View File

@ -53,18 +53,13 @@
#define PPC_IO_DPRINTF(fmt, args...) \
do { \
if (loglevel & CPU_LOG_IOPORT) { \
fprintf(logfile, "%s: " fmt, __func__ , ##args); \
qemu_log("%s: " fmt, __func__ , ##args); \
} else { \
printf("%s : " fmt, __func__ , ##args); \
} \
} while (0)
#elif defined (DEBUG_PPC_IO)
#define PPC_IO_DPRINTF(fmt, args...) \
do { \
if (loglevel & CPU_LOG_IOPORT) { \
fprintf(logfile, "%s: " fmt, __func__ , ##args); \
} \
} while (0)
#define PPC_IO_DPRINTF(fmt, args...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
#else
#define PPC_IO_DPRINTF(fmt, args...) do { } while (0)
#endif

11
kqemu.c
View File

@ -49,15 +49,8 @@
#ifdef DEBUG
# define LOG_INT(...) do { \
if (loglevel & CPU_LOG_INT) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_INT_STATE(env) \
do { \
if (loglevel & CPU_LOG_INT) \
cpu_dump_state(env, logfile, fprintf, 0); \
} while (0)
# define LOG_INT(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__)
# define LOG_INT_STATE(env) log_cpu_state_mask(CPU_LOG_INT, (env), 0)
#else
# define LOG_INT(...) do { } while (0)
# define LOG_INT_STATE(env) do { } while (0)

2
linux-user/elfload.c
View File

@ -1454,7 +1454,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs,
free(elf_phdata);
if (loglevel)
if (qemu_log_enabled())
load_symbols(&elf_ex, bprm->fd);
if (interpreter_type != INTERPRETER_AOUT) close(bprm->fd);

32
linux-user/main.c
View File

@ -1057,10 +1057,8 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
do { \
fprintf(stderr, fmt , ##args); \
cpu_dump_state(env, stderr, fprintf, 0); \
if (loglevel != 0) { \
fprintf(logfile, fmt , ##args); \
cpu_dump_state(env, logfile, fprintf, 0); \
} \
qemu_log(fmt, ##args); \
log_cpu_state(env, 0); \
} while (0)
void cpu_loop(CPUPPCState *env)
@ -2396,21 +2394,19 @@ int main(int argc, char **argv, char **envp)
free(target_environ);
if (loglevel) {
page_dump(logfile);
log_page_dump();
fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
info->start_code);
fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
info->start_data);
fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
info->start_stack);
fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
}
qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
info->start_code);
qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
info->start_data);
qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
info->start_stack);
qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
target_set_brk(info->brk);
syscall_init();

2
linux-user/vm86.c
View File

@ -30,7 +30,7 @@
//#define DEBUG_VM86
#ifdef DEBUG_VM86
# define LOG_VM86(...) fprintf(logfile, ## __VA_ARGS__);
# define LOG_VM86(...) qemu_log(__VA_ARGS__);
#else
# define LOG_VM86(...) do { } while (0)
#endif

15
target-alpha/translate.c
View File

@ -39,10 +39,7 @@
#ifdef ALPHA_DEBUG_DISAS
# define LOG_DISAS(...) do { \
if (logfile) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_DISAS(...) qemu_log(__VA_ARGS__)
#else
# define LOG_DISAS(...) do { } while (0)
#endif
@ -2444,13 +2441,11 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
tb->icount = num_insns;
}
#if defined ALPHA_DEBUG_DISAS
if (loglevel & CPU_LOG_TB_CPU) {
cpu_dump_state(env, logfile, fprintf, 0);
}
log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
target_disas(logfile, pc_start, ctx.pc - pc_start, 1);
fprintf(logfile, "\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(pc_start, ctx.pc - pc_start, 1);
qemu_log("\n");
}
#endif
}

8
target-arm/translate.c
View File

@ -8871,10 +8871,10 @@ done_generating:
#ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "----------------\n");
fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
target_disas(logfile, pc_start, dc->pc - pc_start, env->thumb);
fprintf(logfile, "\n");
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(pc_start, dc->pc - pc_start, env->thumb);
qemu_log("\n");
}
#endif
if (search_pc) {

2
target-cris/helper.c
View File

@ -34,7 +34,7 @@
#ifdef CRIS_HELPER_DEBUG
#define D(x) x
#define D_LOG(...) fprintf(logfile, ## __VA_ARGS__)
#define D_LOG(...) qemu_log(__VA__ARGS__)
#else
#define D(x)
#define D_LOG(...) do { } while (0)

2
target-cris/mmu.c
View File

@ -32,7 +32,7 @@
#ifdef DEBUG
#define D(x) x
#define D_LOG(...) fprintf(logfile, ## __VA_ARGS__)
#define D_LOG(...) qemu_log(__VA__ARGS__)
#else
#define D(x)
#define D_LOG(...) do { } while (0)

4
target-cris/op_helper.c
View File

@ -30,7 +30,7 @@
#ifdef CRIS_OP_HELPER_DEBUG
#define D(x) x
#define D_LOG(...) fprintf(logfile, ## __VA_ARGS__)
#define D_LOG(...) qemu_log(__VA__ARGS__)
#else
#define D(x)
#define D_LOG(...) do { } while (0)
@ -117,7 +117,7 @@ void helper_spc_write(uint32_t new_spc)
void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
{
(fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1));
qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1);
}
/* Used by the tlb decoder. */

22
target-cris/translate.c
View File

@ -44,10 +44,7 @@
#define DISAS_CRIS 0
#if DISAS_CRIS
# define LOG_DIS(...) do { \
if (loglevel & CPU_LOG_TB_IN_ASM) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
#else
# define LOG_DIS(...) do { } while (0)
#endif
@ -131,7 +128,7 @@ typedef struct DisasContext {
static void gen_BUG(DisasContext *dc, const char *file, int line)
{
printf ("BUG: pc=%x %s %d\n", dc->pc, file, line);
fprintf (logfile, "BUG: pc=%x %s %d\n", dc->pc, file, line);
qemu_log("BUG: pc=%x %s %d\n", dc->pc, file, line);
cpu_abort(dc->env, "%s:%d\n", file, line);
}
@ -798,7 +795,7 @@ static void cris_alu_op_exec(DisasContext *dc, int op,
t_gen_subx_carry(dc, dst);
break;
default:
fprintf (logfile, "illegal ALU op.\n");
qemu_log("illegal ALU op.\n");
BUG();
break;
}
@ -3147,8 +3144,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
int num_insns;
int max_insns;
if (!logfile)
logfile = stderr;
qemu_log_try_set_file(stderr);
/* Odd PC indicates that branch is rexecuting due to exception in the
* delayslot, like in real hw.
@ -3184,7 +3180,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
dc->cpustate_changed = 0;
if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile,
qemu_log(
"srch=%d pc=%x %x flg=%llx bt=%x ds=%u ccs=%x\n"
"pid=%x usp=%x\n"
"%x.%x.%x.%x\n"
@ -3202,8 +3198,8 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
env->regs[10], env->regs[11],
env->regs[12], env->regs[13],
env->regs[14], env->regs[15]);
fprintf(logfile, "--------------\n");
fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
qemu_log("--------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
}
next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
@ -3336,8 +3332,8 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
#ifdef DEBUG_DISAS
#if !DISAS_CRIS
if (loglevel & CPU_LOG_TB_IN_ASM) {
target_disas(logfile, pc_start, dc->pc - pc_start, 0);
fprintf(logfile, "\nisize=%d osize=%zd\n",
log_target_disas(pc_start, dc->pc - pc_start, 0);
qemu_log("\nisize=%d osize=%zd\n",
dc->pc - pc_start, gen_opc_ptr - gen_opc_buf);
}
#endif

77
target-i386/op_helper.c
View File

@ -26,14 +26,9 @@
#ifdef DEBUG_PCALL
# define LOG_PCALL(...) do { \
if (loglevel & CPU_LOG_PCALL) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_PCALL_STATE(env) do { \
if (loglevel & CPU_LOG_PCALL) \
cpu_dump_state((env), logfile, fprintf, X86_DUMP_CCOP); \
} while (0)
# define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__)
# define LOG_PCALL_STATE(env) \
log_cpu_state_mask(CPU_LOG_PCALL, (env), X86_DUMP_CCOP)
#else
# define LOG_PCALL(...) do { } while (0)
# define LOG_PCALL_STATE(env) do { } while (0)
@ -43,8 +38,7 @@
#if 0
#define raise_exception_err(a, b)\
do {\
if (logfile)\
fprintf(logfile, "raise_exception line=%d\n", __LINE__);\
qemu_log("raise_exception line=%d\n", __LINE__);\
(raise_exception_err)(a, b);\
} while (0)
#endif
@ -1215,29 +1209,29 @@ void do_interrupt(int intno, int is_int, int error_code,
if (loglevel & CPU_LOG_INT) {
if ((env->cr[0] & CR0_PE_MASK)) {
static int count;
fprintf(logfile, "%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx,
qemu_log("%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx,
count, intno, error_code, is_int,
env->hflags & HF_CPL_MASK,
env->segs[R_CS].selector, EIP,
(int)env->segs[R_CS].base + EIP,
env->segs[R_SS].selector, ESP);
if (intno == 0x0e) {
fprintf(logfile, " CR2=" TARGET_FMT_lx, env->cr[2]);
qemu_log(" CR2=" TARGET_FMT_lx, env->cr[2]);
} else {
fprintf(logfile, " EAX=" TARGET_FMT_lx, EAX);
qemu_log(" EAX=" TARGET_FMT_lx, EAX);
}
fprintf(logfile, "\n");
cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
qemu_log("\n");
log_cpu_state(env, X86_DUMP_CCOP);
#if 0
{
int i;
uint8_t *ptr;
fprintf(logfile, " code=");
qemu_log(" code=");
ptr = env->segs[R_CS].base + env->eip;
for(i = 0; i < 16; i++) {
fprintf(logfile, " %02x", ldub(ptr + i));
qemu_log(" %02x", ldub(ptr + i));
}
fprintf(logfile, "\n");
qemu_log("\n");
}
#endif
count++;
@ -1270,8 +1264,7 @@ static int check_exception(int intno, int *error_code)
int second_contributory = intno == 0 ||
(intno >= 10 && intno <= 13);
if (loglevel & CPU_LOG_INT)
fprintf(logfile, "check_exception old: 0x%x new 0x%x\n",
qemu_log_mask(CPU_LOG_INT, "check_exception old: 0x%x new 0x%x\n",
env->old_exception, intno);
if (env->old_exception == EXCP08_DBLE)
@ -1352,10 +1345,8 @@ void do_smm_enter(void)
SegmentCache *dt;
int i, offset;
if (loglevel & CPU_LOG_INT) {
fprintf(logfile, "SMM: enter\n");
cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
}
qemu_log_mask(CPU_LOG_INT, "SMM: enter\n");
log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP);
env->hflags |= HF_SMM_MASK;
cpu_smm_update(env);
@ -1595,10 +1586,8 @@ void helper_rsm(void)
env->hflags &= ~HF_SMM_MASK;
cpu_smm_update(env);
if (loglevel & CPU_LOG_INT) {
fprintf(logfile, "SMM: after RSM\n");
cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
}
qemu_log_mask(CPU_LOG_INT, "SMM: after RSM\n");
log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP);
}
#endif /* !CONFIG_USER_ONLY */
@ -2156,7 +2145,7 @@ void helper_load_seg(int seg_reg, int selector)
get_seg_limit(e1, e2),
e2);
#if 0
fprintf(logfile, "load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx flags=%08x\n",
qemu_log("load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx flags=%08x\n",
selector, (unsigned long)sc->base, sc->limit, sc->flags);
#endif
}
@ -4774,8 +4763,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
else
addr = (uint32_t)EAX;
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile,"vmrun! " TARGET_FMT_lx "\n", addr);
qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmrun! " TARGET_FMT_lx "\n", addr);
env->vm_vmcb = addr;
@ -4895,8 +4883,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
uint32_t event_inj_err = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj_err));
stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj), event_inj & ~SVM_EVTINJ_VALID);
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile, "Injecting(%#hx): ", valid_err);
qemu_log_mask(CPU_LOG_TB_IN_ASM, "Injecting(%#hx): ", valid_err);
/* FIXME: need to implement valid_err */
switch (event_inj & SVM_EVTINJ_TYPE_MASK) {
case SVM_EVTINJ_TYPE_INTR:
@ -4904,8 +4891,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->error_code = event_inj_err;
env->exception_is_int = 0;
env->exception_next_eip = -1;
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile, "INTR");
qemu_log_mask(CPU_LOG_TB_IN_ASM, "INTR");
/* XXX: is it always correct ? */
do_interrupt(vector, 0, 0, 0, 1);
break;
@ -4914,8 +4900,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->error_code = event_inj_err;
env->exception_is_int = 0;
env->exception_next_eip = EIP;
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile, "NMI");
qemu_log_mask(CPU_LOG_TB_IN_ASM, "NMI");
cpu_loop_exit();
break;
case SVM_EVTINJ_TYPE_EXEPT:
@ -4923,8 +4908,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->error_code = event_inj_err;
env->exception_is_int = 0;
env->exception_next_eip = -1;
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile, "EXEPT");
qemu_log_mask(CPU_LOG_TB_IN_ASM, "EXEPT");
cpu_loop_exit();
break;
case SVM_EVTINJ_TYPE_SOFT:
@ -4932,13 +4916,11 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->error_code = event_inj_err;
env->exception_is_int = 1;
env->exception_next_eip = EIP;
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile, "SOFT");
qemu_log_mask(CPU_LOG_TB_IN_ASM, "SOFT");
cpu_loop_exit();
break;
}
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile, " %#x %#x\n", env->exception_index, env->error_code);
qemu_log_mask(CPU_LOG_TB_IN_ASM, " %#x %#x\n", env->exception_index, env->error_code);
}
}
@ -4958,8 +4940,7 @@ void helper_vmload(int aflag)
else
addr = (uint32_t)EAX;
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile,"vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)),
env->segs[R_FS].base);
@ -4994,8 +4975,7 @@ void helper_vmsave(int aflag)
else
addr = (uint32_t)EAX;
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile,"vmsave! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmsave! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)),
env->segs[R_FS].base);
@ -5143,8 +5123,7 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
{
uint32_t int_ctl;
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile,"vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n",
qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n",
exit_code, exit_info_1,
ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2)),
EIP);

18
target-i386/translate.c
View File

@ -7675,21 +7675,19 @@ static inline void gen_intermediate_code_internal(CPUState *env,
}
#ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_CPU) {
cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
}
log_cpu_state_mask(CPU_LOG_TB_CPU, env, X86_DUMP_CCOP);
if (loglevel & CPU_LOG_TB_IN_ASM) {
int disas_flags;
fprintf(logfile, "----------------\n");
fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
#ifdef TARGET_X86_64
if (dc->code64)
disas_flags = 2;
else
#endif
disas_flags = !dc->code32;
target_disas(logfile, pc_start, pc_ptr - pc_start, disas_flags);
fprintf(logfile, "\n");
log_target_disas(pc_start, pc_ptr - pc_start, disas_flags);
qemu_log("\n");
}
#endif
@ -7716,13 +7714,13 @@ void gen_pc_load(CPUState *env, TranslationBlock *tb,
#ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_OP) {
int i;
fprintf(logfile, "RESTORE:\n");
qemu_log("RESTORE:\n");
for(i = 0;i <= pc_pos; i++) {
if (gen_opc_instr_start[i]) {
fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
qemu_log("0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
}
}
fprintf(logfile, "spc=0x%08lx pc_pos=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
qemu_log("spc=0x%08lx pc_pos=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
searched_pc, pc_pos, gen_opc_pc[pc_pos] - tb->cs_base,
(uint32_t)tb->cs_base);
}

10
target-m68k/translate.c
View File

@ -165,7 +165,7 @@ typedef void (*disas_proc)(DisasContext *, uint16_t);
#define DISAS_INSN(name) \
static void real_disas_##name (DisasContext *s, uint16_t insn); \
static void disas_##name (DisasContext *s, uint16_t insn) { \
if (logfile) fprintf(logfile, "Dispatch " #name "\n"); \
qemu_log("Dispatch " #name "\n"); \
real_disas_##name(s, insn); } \
static void real_disas_##name (DisasContext *s, uint16_t insn)
#else
@ -3064,10 +3064,10 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
#ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "----------------\n");
fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
target_disas(logfile, pc_start, dc->pc - pc_start, 0);
fprintf(logfile, "\n");
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(pc_start, dc->pc - pc_start, 0);
qemu_log("\n");
}
#endif
if (search_pc) {

39
target-mips/helper.c
View File

@ -117,10 +117,7 @@ static int get_physical_address (CPUState *env, target_ulong *physical,
int ret = TLBRET_MATCH;
#if 0
if (logfile) {
fprintf(logfile, "user mode %d h %08x\n",
user_mode, env->hflags);
}
qemu_log("user mode %d h %08x\n", user_mode, env->hflags);
#endif
if (address <= (int32_t)0x7FFFFFFFUL) {
@ -198,9 +195,8 @@ static int get_physical_address (CPUState *env, target_ulong *physical,
}
}
#if 0
if (logfile) {
fprintf(logfile, TARGET_FMT_lx " %d %d => " TARGET_FMT_lx " %d (%d)\n",
address, rw, access_type, *physical, *prot, ret);
qemu_log(TARGET_FMT_lx " %d %d => " TARGET_FMT_lx " %d (%d)\n",
address, rw, access_type, *physical, *prot, ret);
}
#endif
@ -233,13 +229,11 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
int access_type;
int ret = 0;
if (logfile) {
#if 0
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#endif
fprintf(logfile, "%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d smmu %d\n",
__func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu);
}
qemu_log("%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d smmu %d\n",
__func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu);
rw &= 1;
@ -252,10 +246,8 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
#else
ret = get_physical_address(env, &physical, &prot,
address, rw, access_type);
if (logfile) {
fprintf(logfile, "%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_lx " prot %d\n",
__func__, address, ret, physical, prot);
}
qemu_log("%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_lx " prot %d\n",
__func__, address, ret, physical, prot);
if (ret == TLBRET_MATCH) {
ret = tlb_set_page(env, address & TARGET_PAGE_MASK,
physical & TARGET_PAGE_MASK, prot,
@ -357,14 +349,14 @@ void do_interrupt (CPUState *env)
int cause = -1;
const char *name;
if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) {
if (qemu_log_enabled() && env->exception_index != EXCP_EXT_INTERRUPT) {
if (env->exception_index < 0 || env->exception_index > EXCP_LAST)
name = "unknown";
else
name = excp_names[env->exception_index];
fprintf(logfile, "%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n",
__func__, env->active_tc.PC, env->CP0_EPC, name);
qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n",
__func__, env->active_tc.PC, env->CP0_EPC, name);
}
if (env->exception_index == EXCP_EXT_INTERRUPT &&
(env->hflags & MIPS_HFLAG_DM))
@ -558,15 +550,12 @@ void do_interrupt (CPUState *env)
env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC);
break;
default:
if (logfile) {
fprintf(logfile, "Invalid MIPS exception %d. Exiting\n",
env->exception_index);
}
qemu_log("Invalid MIPS exception %d. Exiting\n", env->exception_index);
printf("Invalid MIPS exception %d. Exiting\n", env->exception_index);
exit(1);
}
if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) {
fprintf(logfile, "%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n"
if (qemu_log_enabled() && env->exception_index != EXCP_EXT_INTERRUPT) {
qemu_log("%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n"
" S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n",
__func__, env->active_tc.PC, env->CP0_EPC, cause,
env->CP0_Status, env->CP0_Cause, env->CP0_BadVAddr,

66
target-mips/op_helper.c
View File

@ -29,8 +29,8 @@
void do_raise_exception_err (uint32_t exception, int error_code)
{
#if 1
if (logfile && exception < 0x100)
fprintf(logfile, "%s: %d %d\n", __func__, exception, error_code);
if (exception < 0x100)
qemu_log("%s: %d %d\n", __func__, exception, error_code);
#endif
env->exception_index = exception;
env->error_code = error_code;
@ -1342,21 +1342,21 @@ void do_mtc0_datahi (target_ulong t0)
void do_mtc0_status_debug(uint32_t old, uint32_t val)
{
fprintf(logfile, "Status %08x (%08x) => %08x (%08x) Cause %08x",
qemu_log("Status %08x (%08x) => %08x (%08x) Cause %08x",
old, old & env->CP0_Cause & CP0Ca_IP_mask,
val, val & env->CP0_Cause & CP0Ca_IP_mask,
env->CP0_Cause);
switch (env->hflags & MIPS_HFLAG_KSU) {
case MIPS_HFLAG_UM: fputs(", UM\n", logfile); break;
case MIPS_HFLAG_SM: fputs(", SM\n", logfile); break;
case MIPS_HFLAG_KM: fputs("\n", logfile); break;
case MIPS_HFLAG_UM: qemu_log(", UM\n"); break;
case MIPS_HFLAG_SM: qemu_log(", SM\n"); break;
case MIPS_HFLAG_KM: qemu_log("\n"); break;
default: cpu_abort(env, "Invalid MMU mode!\n"); break;
}
}
void do_mtc0_status_irqraise_debug(void)
{
fprintf(logfile, "Raise pending IRQs\n");
qemu_log("Raise pending IRQs\n");
}
/* MIPS MT functions */
@ -1705,35 +1705,38 @@ target_ulong do_ei (void)
static void debug_pre_eret (void)
{
fprintf(logfile, "ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
env->active_tc.PC, env->CP0_EPC);
if (env->CP0_Status & (1 << CP0St_ERL))
fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
if (env->hflags & MIPS_HFLAG_DM)
fprintf(logfile, " DEPC " TARGET_FMT_lx, env->CP0_DEPC);
fputs("\n", logfile);
if (loglevel & CPU_LOG_EXEC) {
qemu_log("ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
env->active_tc.PC, env->CP0_EPC);
if (env->CP0_Status & (1 << CP0St_ERL))
qemu_log(" ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
if (env->hflags & MIPS_HFLAG_DM)
qemu_log(" DEPC " TARGET_FMT_lx, env->CP0_DEPC);
qemu_log("\n");
}
}
static void debug_post_eret (void)
{
fprintf(logfile, " => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
env->active_tc.PC, env->CP0_EPC);
if (env->CP0_Status & (1 << CP0St_ERL))
fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
if (env->hflags & MIPS_HFLAG_DM)
fprintf(logfile, " DEPC " TARGET_FMT_lx, env->CP0_DEPC);
switch (env->hflags & MIPS_HFLAG_KSU) {
case MIPS_HFLAG_UM: fputs(", UM\n", logfile); break;
case MIPS_HFLAG_SM: fputs(", SM\n", logfile); break;
case MIPS_HFLAG_KM: fputs("\n", logfile); break;
default: cpu_abort(env, "Invalid MMU mode!\n"); break;
if (loglevel & CPU_LOG_EXEC) {
qemu_log(" => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
env->active_tc.PC, env->CP0_EPC);
if (env->CP0_Status & (1 << CP0St_ERL))
qemu_log(" ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
if (env->hflags & MIPS_HFLAG_DM)
qemu_log(" DEPC " TARGET_FMT_lx, env->CP0_DEPC);
switch (env->hflags & MIPS_HFLAG_KSU) {
case MIPS_HFLAG_UM: qemu_log(", UM\n"); break;
case MIPS_HFLAG_SM: qemu_log(", SM\n"); break;
case MIPS_HFLAG_KM: qemu_log("\n"); break;
default: cpu_abort(env, "Invalid MMU mode!\n"); break;
}
}
}
void do_eret (void)
{
if (loglevel & CPU_LOG_EXEC)
debug_pre_eret();
debug_pre_eret();
if (env->CP0_Status & (1 << CP0St_ERL)) {
env->active_tc.PC = env->CP0_ErrorEPC;
env->CP0_Status &= ~(1 << CP0St_ERL);
@ -1742,20 +1745,17 @@ void do_eret (void)
env->CP0_Status &= ~(1 << CP0St_EXL);
}
compute_hflags(env);
if (loglevel & CPU_LOG_EXEC)
debug_post_eret();
debug_post_eret();
env->CP0_LLAddr = 1;
}
void do_deret (void)
{
if (loglevel & CPU_LOG_EXEC)
debug_pre_eret();
debug_pre_eret();
env->active_tc.PC = env->CP0_DEPC;
env->hflags &= MIPS_HFLAG_DM;
compute_hflags(env);
if (loglevel & CPU_LOG_EXEC)
debug_post_eret();
debug_post_eret();
env->CP0_LLAddr = 1;
}
#endif /* !CONFIG_USER_ONLY */

39
target-mips/translate.c
View File

@ -514,18 +514,11 @@ static const char *fregnames_h[] =
"h24", "h25", "h26", "h27", "h28", "h29", "h30", "h31", };
#ifdef MIPS_DEBUG_DISAS
#define MIPS_DEBUG(fmt, args...) \
do { \
if (loglevel & CPU_LOG_TB_IN_ASM) { \
fprintf(logfile, TARGET_FMT_lx ": %08x " fmt "\n", \
ctx->pc, ctx->opcode , ##args); \
} \
} while (0)
#define LOG_DISAS(...) \
do { \
if (loglevel & CPU_LOG_TB_IN_ASM) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
#define MIPS_DEBUG(fmt, args...) \
qemu_log_mask(CPU_LOG_TB_IN_ASM, \
TARGET_FMT_lx ": %08x " fmt "\n", \
ctx->pc, ctx->opcode , ##args)
#define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
#else
#define MIPS_DEBUG(fmt, args...) do { } while(0)
#define LOG_DISAS(...) do { } while (0)
@ -8180,8 +8173,8 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
int num_insns;
int max_insns;
if (search_pc && loglevel)
fprintf (logfile, "search pc %d\n", search_pc);
if (search_pc)
qemu_log("search pc %d\n", search_pc);
pc_start = tb->pc;
/* Leave some spare opc slots for branch handling. */
@ -8203,11 +8196,9 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
#ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_CPU) {
fprintf(logfile, "------------------------------------------------\n");
/* FIXME: This may print out stale hflags from env... */
cpu_dump_state(env, logfile, fprintf, 0);
}
qemu_log_mask(CPU_LOG_TB_CPU, "------------------------------------------------\n");
/* FIXME: This may print out stale hflags from env... */
log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
#endif
LOG_DISAS("\ntb %p idx %d hflags %04x\n", tb, ctx.mem_idx, ctx.hflags);
gen_icount_start();
@ -8299,13 +8290,11 @@ done_generating:
#ifdef DEBUG_DISAS
LOG_DISAS("\n");
if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
target_disas(logfile, pc_start, ctx.pc - pc_start, 0);
fprintf(logfile, "\n");
}
if (loglevel & CPU_LOG_TB_CPU) {
fprintf(logfile, "---------------- %d %08x\n", ctx.bstate, ctx.hflags);
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(pc_start, ctx.pc - pc_start, 0);
qemu_log("\n");
}
qemu_log_mask(CPU_LOG_TB_CPU, "---------------- %d %08x\n", ctx.bstate, ctx.hflags);
#endif
}

98
target-ppc/helper.c
View File

@ -40,14 +40,8 @@
//#define FLUSH_ALL_TLBS
#ifdef DEBUG_MMU
# define LOG_MMU(...) do { \
if (loglevel) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_MMU_STATE(env) do { \
if (loglevel) \
cpu_dump_state(env, logfile, fprintf, 0); \
} while (0)
# define LOG_MMU(...) qemu_log(__VA_ARGS__)
# define LOG_MMU_STATE(env) log_cpu_state((env), 0)
#else
# define LOG_MMU(...) do { } while (0)
# define LOG_MMU_STATE(...) do { } while (0)
@ -55,37 +49,25 @@
#ifdef DEBUG_SOFTWARE_TLB
# define LOG_SWTLB(...) do { \
if (loglevel) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_SWTLB(...) qemu_log(__VA_ARGS__)
#else
# define LOG_SWTLB(...) do { } while (0)
#endif
#ifdef DEBUG_BATS
# define LOG_BATS(...) do { \
if (loglevel) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_BATS(...) qemu_log(__VA_ARGS__)
#else
# define LOG_BATS(...) do { } while (0)
#endif
#ifdef DEBUG_SLB
# define LOG_SLB(...) do { \
if (loglevel) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_SLB(...) qemu_log(__VA_ARGS__)
#else
# define LOG_SLB(...) do { } while (0)
#endif
#ifdef DEBUG_EXCEPTIONS
# define LOG_EXCP(...) do { \
if (loglevel) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_EXCP(...) qemu_log(__VA_ARGS__)
#else
# define LOG_EXCP(...) do { } while (0)
#endif
@ -257,8 +239,7 @@ static always_inline int _pte_check (mmu_ctx_t *ctx, int is_64b,
if (ctx->raddr != (target_phys_addr_t)-1ULL) {
/* all matches should have equal RPN, WIMG & PP */
if ((ctx->raddr & mmask) != (pte1 & mmask)) {
if (loglevel != 0)
fprintf(logfile, "Bad RPN/WIMG/PP\n");
qemu_log("Bad RPN/WIMG/PP\n");
return -3;
}
}
@ -988,11 +969,11 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
}
}
#if defined (DUMP_PAGE_TABLES)
if (loglevel != 0) {
if (qemu_log_enabled()) {
target_phys_addr_t curaddr;
uint32_t a0, a1, a2, a3;
fprintf(logfile, "Page table: " PADDRX " len " PADDRX "\n",
sdr, mask + 0x80);
qemu_log("Page table: " PADDRX " len " PADDRX "\n",
sdr, mask + 0x80);
for (curaddr = sdr; curaddr < (sdr + mask + 0x80);
curaddr += 16) {
a0 = ldl_phys(curaddr);
@ -1000,8 +981,8 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
a2 = ldl_phys(curaddr + 8);
a3 = ldl_phys(curaddr + 12);
if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
fprintf(logfile, PADDRX ": %08x %08x %08x %08x\n",
curaddr, a0, a1, a2, a3);
qemu_log(PADDRX ": %08x %08x %08x %08x\n",
curaddr, a0, a1, a2, a3);
}
}
}
@ -1037,10 +1018,8 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
/* eciwx or ecowx */
return -4;
default:
if (logfile) {
fprintf(logfile, "ERROR: instruction should not need "
qemu_log("ERROR: instruction should not need "
"address translation\n");
}
return -4;
}
if ((rw == 1 || ctx->key != 1) && (rw == 0 || ctx->key != 0)) {
@ -1064,8 +1043,7 @@ static always_inline int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb,
/* Check valid flag */
if (!(tlb->prot & PAGE_VALID)) {
if (loglevel != 0)
fprintf(logfile, "%s: TLB %d not valid\n", __func__, i);
qemu_log("%s: TLB %d not valid\n", __func__, i);
return -1;
}
mask = ~(tlb->size - 1);
@ -1335,9 +1313,7 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr,
int ret;
#if 0
if (loglevel != 0) {
fprintf(logfile, "%s\n", __func__);
}
qemu_log("%s\n", __func__);
#endif
if ((access_type == ACCESS_CODE && msr_ir == 0) ||
(access_type != ACCESS_CODE && msr_dr == 0)) {
@ -1388,10 +1364,8 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr,
}
}
#if 0
if (loglevel != 0) {
fprintf(logfile, "%s address " ADDRX " => %d " PADDRX "\n",
qemu_log("%s address " ADDRX " => %d " PADDRX "\n",
__func__, eaddr, ret, ctx->raddr);
}
#endif
return ret;
@ -2016,7 +1990,7 @@ void ppc_hw_interrupt (CPUState *env)
#else /* defined (CONFIG_USER_ONLY) */
static always_inline void dump_syscall (CPUState *env)
{
fprintf(logfile, "syscall r0=" REGX " r3=" REGX " r4=" REGX
qemu_log_mask(CPU_LOG_INT, "syscall r0=" REGX " r3=" REGX " r4=" REGX
" r5=" REGX " r6=" REGX " nip=" ADDRX "\n",
ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), ppc_dump_gpr(env, 4),
ppc_dump_gpr(env, 5), ppc_dump_gpr(env, 6), env->nip);
@ -2042,10 +2016,8 @@ static always_inline void powerpc_excp (CPUState *env,
lpes1 = 1;
}
if (loglevel & CPU_LOG_INT) {
fprintf(logfile, "Raise exception at " ADDRX " => %08x (%02x)\n",
env->nip, excp, env->error_code);
}
qemu_log_mask(CPU_LOG_INT, "Raise exception at " ADDRX " => %08x (%02x)\n",
env->nip, excp, env->error_code);
msr = env->msr;
new_msr = msr;
srr0 = SPR_SRR0;
@ -2079,8 +2051,8 @@ static always_inline void powerpc_excp (CPUState *env,
/* Machine check exception is not enabled.
* Enter checkstop state.
*/
if (loglevel != 0) {
fprintf(logfile, "Machine check while not allowed. "
if (qemu_log_enabled()) {
qemu_log("Machine check while not allowed. "
"Entering checkstop state\n");
} else {
fprintf(stderr, "Machine check while not allowed. "
@ -2200,9 +2172,7 @@ static always_inline void powerpc_excp (CPUState *env,
return;
}
}
if (loglevel & CPU_LOG_INT) {
dump_syscall(env);
}
dump_syscall(env);
new_msr &= ~((target_ulong)1 << MSR_RI);
lev = env->error_code;
if (lev == 1 || (lpes0 == 0 && lpes1 == 0))
@ -2416,7 +2386,7 @@ static always_inline void powerpc_excp (CPUState *env,
case POWERPC_EXCP_7x5:
tlb_miss:
#if defined (DEBUG_SOFTWARE_TLB)
if (loglevel != 0) {
if (qemu_log_enabled()) {
const unsigned char *es;
target_ulong *miss, *cmp;
int en;
@ -2434,7 +2404,7 @@ static always_inline void powerpc_excp (CPUState *env,
miss = &env->spr[SPR_DMISS];
cmp = &env->spr[SPR_DCMP];
}
fprintf(logfile, "6xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
qemu_log("6xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
" H1 " ADDRX " H2 " ADDRX " %08x\n",
es, en, *miss, en, *cmp,
env->spr[SPR_HASH1], env->spr[SPR_HASH2],
@ -2449,7 +2419,7 @@ static always_inline void powerpc_excp (CPUState *env,
case POWERPC_EXCP_74xx:
tlb_miss_74xx:
#if defined (DEBUG_SOFTWARE_TLB)
if (loglevel != 0) {
if (qemu_log_enabled()) {
const unsigned char *es;
target_ulong *miss, *cmp;
int en;
@ -2467,7 +2437,7 @@ static always_inline void powerpc_excp (CPUState *env,
miss = &env->spr[SPR_TLBMISS];
cmp = &env->spr[SPR_PTEHI];
}
fprintf(logfile, "74xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
qemu_log("74xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
" %08x\n",
es, en, *miss, en, *cmp, env->error_code);
}
@ -2619,11 +2589,9 @@ void ppc_hw_interrupt (CPUPPCState *env)
int hdice;
#if 0
if (loglevel & CPU_LOG_INT) {
fprintf(logfile, "%s: %p pending %08x req %08x me %d ee %d\n",
qemu_log_mask(CPU_LOG_INT, "%s: %p pending %08x req %08x me %d ee %d\n",
__func__, env, env->pending_interrupts,
env->interrupt_request, (int)msr_me, (int)msr_ee);
}
#endif
/* External reset */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_RESET)) {
@ -2735,16 +2703,8 @@ void ppc_hw_interrupt (CPUPPCState *env)
void cpu_dump_rfi (target_ulong RA, target_ulong msr)
{
FILE *f;
if (logfile) {
f = logfile;
} else {
f = stdout;
return;
}
fprintf(f, "Return from exception at " ADDRX " with flags " ADDRX "\n",
RA, msr);
qemu_log("Return from exception at " ADDRX " with flags " ADDRX "\n",
RA, msr);
}
void cpu_ppc_reset (void *opaque)

33
target-ppc/op_helper.c
View File

@ -29,10 +29,7 @@
//#define DEBUG_SOFTWARE_TLB
#ifdef DEBUG_SOFTWARE_TLB
# define LOG_SWTLB(...) do { \
if (loglevel) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_SWTLB(...) qemu_log(__VA_ARGS__)
#else
# define LOG_SWTLB(...) do { } while (0)
#endif
@ -84,18 +81,14 @@ void helper_store_cr (target_ulong val, uint32_t mask)
/* SPR accesses */
void helper_load_dump_spr (uint32_t sprn)
{
if (loglevel != 0) {
fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n",
qemu_log("Read SPR %d %03x => " ADDRX "\n",
sprn, sprn, env->spr[sprn]);
}
}
void helper_store_dump_spr (uint32_t sprn)
{
if (loglevel != 0) {
fprintf(logfile, "Write SPR %d %03x <= " ADDRX "\n",
qemu_log("Write SPR %d %03x <= " ADDRX "\n",
sprn, sprn, env->spr[sprn]);
}
}
target_ulong helper_load_tbl (void)
@ -192,10 +185,8 @@ void helper_store_hid0_601 (target_ulong val)
env->hflags_nmsr &= ~(1 << MSR_LE);
env->hflags_nmsr |= (1 << MSR_LE) & (((val >> 3) & 1) << MSR_LE);
env->hflags |= env->hflags_nmsr;
if (loglevel != 0) {
fprintf(logfile, "%s: set endianness to %c => " ADDRX "\n",
qemu_log("%s: set endianness to %c => " ADDRX "\n",
__func__, val & 0x8 ? 'l' : 'b', env->hflags);
}
}
env->spr[SPR_HID0] = (uint32_t)val;
}
@ -1870,15 +1861,11 @@ target_ulong helper_load_dcr (target_ulong dcrn)
target_ulong val = 0;
if (unlikely(env->dcr_env == NULL)) {
if (loglevel != 0) {
fprintf(logfile, "No DCR environment\n");
}
qemu_log("No DCR environment\n");
helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL);
} else if (unlikely(ppc_dcr_read(env->dcr_env, dcrn, &val) != 0)) {
if (loglevel != 0) {
fprintf(logfile, "DCR read error %d %03x\n", (int)dcrn, (int)dcrn);
}
qemu_log("DCR read error %d %03x\n", (int)dcrn, (int)dcrn);
helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
}
@ -1888,15 +1875,11 @@ target_ulong helper_load_dcr (target_ulong dcrn)
void helper_store_dcr (target_ulong dcrn, target_ulong val)
{
if (unlikely(env->dcr_env == NULL)) {
if (loglevel != 0) {
fprintf(logfile, "No DCR environment\n");
}
qemu_log("No DCR environment\n");
helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL);
} else if (unlikely(ppc_dcr_write(env->dcr_env, dcrn, val) != 0)) {
if (loglevel != 0) {
fprintf(logfile, "DCR write error %d %03x\n", (int)dcrn, (int)dcrn);
}
qemu_log("DCR write error %d %03x\n", (int)dcrn, (int)dcrn);
helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
}

55
target-ppc/translate.c
View File

@ -43,10 +43,7 @@
//#define DO_PPC_STATISTICS
#ifdef PPC_DEBUG_DISAS
# define LOG_DISAS(...) do { \
if (loglevel & CPU_LOG_TB_IN_ASM) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
#else
# define LOG_DISAS(...) do { } while (0)
#endif
@ -3900,10 +3897,8 @@ static always_inline void gen_op_mfspr (DisasContext *ctx)
* allowing userland application to read the PVR
*/
if (sprn != SPR_PVR) {
if (loglevel != 0) {
fprintf(logfile, "Trying to read privileged spr %d %03x at "
qemu_log("Trying to read privileged spr %d %03x at "
ADDRX "\n", sprn, sprn, ctx->nip);
}
printf("Trying to read privileged spr %d %03x at " ADDRX "\n",
sprn, sprn, ctx->nip);
}
@ -3911,10 +3906,8 @@ static always_inline void gen_op_mfspr (DisasContext *ctx)
}
} else {
/* Not defined */
if (loglevel != 0) {
fprintf(logfile, "Trying to read invalid spr %d %03x at "
qemu_log("Trying to read invalid spr %d %03x at "
ADDRX "\n", sprn, sprn, ctx->nip);
}
printf("Trying to read invalid spr %d %03x at " ADDRX "\n",
sprn, sprn, ctx->nip);
gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR);
@ -4046,20 +4039,16 @@ GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC)
(*write_cb)(ctx, sprn, rS(ctx->opcode));
} else {
/* Privilege exception */
if (loglevel != 0) {
fprintf(logfile, "Trying to write privileged spr %d %03x at "
qemu_log("Trying to write privileged spr %d %03x at "
ADDRX "\n", sprn, sprn, ctx->nip);
}
printf("Trying to write privileged spr %d %03x at " ADDRX "\n",
sprn, sprn, ctx->nip);
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);
}
} else {
/* Not defined */
if (loglevel != 0) {
fprintf(logfile, "Trying to write invalid spr %d %03x at "
qemu_log("Trying to write invalid spr %d %03x at "
ADDRX "\n", sprn, sprn, ctx->nip);
}
printf("Trying to write invalid spr %d %03x at " ADDRX "\n",
sprn, sprn, ctx->nip);
gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR);
@ -8267,11 +8256,11 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
}
/* Is opcode *REALLY* valid ? */
if (unlikely(handler->handler == &gen_invalid)) {
if (loglevel != 0) {
fprintf(logfile, "invalid/unsupported opcode: "
"%02x - %02x - %02x (%08x) " ADDRX " %d\n",
opc1(ctx.opcode), opc2(ctx.opcode),
opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
if (qemu_log_enabled()) {
qemu_log("invalid/unsupported opcode: "
"%02x - %02x - %02x (%08x) " ADDRX " %d\n",
opc1(ctx.opcode), opc2(ctx.opcode),
opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
} else {
printf("invalid/unsupported opcode: "
"%02x - %02x - %02x (%08x) " ADDRX " %d\n",
@ -8280,12 +8269,12 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
}
} else {
if (unlikely((ctx.opcode & handler->inval) != 0)) {
if (loglevel != 0) {
fprintf(logfile, "invalid bits: %08x for opcode: "
"%02x - %02x - %02x (%08x) " ADDRX "\n",
ctx.opcode & handler->inval, opc1(ctx.opcode),
opc2(ctx.opcode), opc3(ctx.opcode),
ctx.opcode, ctx.nip - 4);
if (qemu_log_enabled()) {
qemu_log("invalid bits: %08x for opcode: "
"%02x - %02x - %02x (%08x) " ADDRX "\n",
ctx.opcode & handler->inval, opc1(ctx.opcode),
opc2(ctx.opcode), opc3(ctx.opcode),
ctx.opcode, ctx.nip - 4);
} else {
printf("invalid bits: %08x for opcode: "
"%02x - %02x - %02x (%08x) " ADDRX "\n",
@ -8343,17 +8332,15 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
tb->icount = num_insns;
}
#if defined(DEBUG_DISAS)
if (loglevel & CPU_LOG_TB_CPU) {
fprintf(logfile, "---------------- excp: %04x\n", ctx.exception);
cpu_dump_state(env, logfile, fprintf, 0);
}
qemu_log_mask(CPU_LOG_TB_CPU, "---------------- excp: %04x\n", ctx.exception);
log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
if (loglevel & CPU_LOG_TB_IN_ASM) {
int flags;
flags = env->bfd_mach;
flags |= ctx.le_mode << 16;
fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
target_disas(logfile, pc_start, ctx.nip - pc_start, flags);
fprintf(logfile, "\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(pc_start, ctx.nip - pc_start, flags);
qemu_log("\n");
}
#endif
}

6
target-sh4/helper.c
View File

@ -151,9 +151,9 @@ void do_interrupt(CPUState * env)
expname = do_irq ? "interrupt" : "???";
break;
}
fprintf(logfile, "exception 0x%03x [%s] raised\n",
irq_vector, expname);
cpu_dump_state(env, logfile, fprintf, 0);
qemu_log("exception 0x%03x [%s] raised\n",
irq_vector, expname);
log_cpu_state(env, 0);
}
env->ssr = env->sr;

17
target-sh4/translate.c
View File

@ -1840,11 +1840,9 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb,
ctx.features = env->features;
#ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_CPU) {
fprintf(logfile,
"------------------------------------------------\n");
cpu_dump_state(env, logfile, fprintf, 0);
}
qemu_log_mask(CPU_LOG_TB_CPU,
"------------------------------------------------\n");
log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
#endif
ii = -1;
@ -1937,13 +1935,12 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb,
#ifdef DEBUG_DISAS
#ifdef SH4_DEBUG_DISAS
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile, "\n");
qemu_log_mask(CPU_LOG_TB_IN_ASM, "\n");
#endif
if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "IN:\n"); /* , lookup_symbol(pc_start)); */
target_disas(logfile, pc_start, ctx.pc - pc_start, 0);
fprintf(logfile, "\n");
qemu_log("IN:\n"); /* , lookup_symbol(pc_start)); */
log_target_disas(pc_start, ctx.pc - pc_start, 0);
qemu_log("\n");
}
#endif
}

20
target-sparc/op_helper.c
View File

@ -2829,23 +2829,23 @@ void do_interrupt(CPUState *env)
name = "Unknown";
}
fprintf(logfile, "%6d: %s (v=%04x) pc=%016" PRIx64 " npc=%016" PRIx64
qemu_log("%6d: %s (v=%04x) pc=%016" PRIx64 " npc=%016" PRIx64
" SP=%016" PRIx64 "\n",
count, name, intno,
env->pc,
env->npc, env->regwptr[6]);
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#if 0
{
int i;
uint8_t *ptr;
fprintf(logfile, " code=");
qemu_log(" code=");
ptr = (uint8_t *)env->pc;
for(i = 0; i < 16; i++) {
fprintf(logfile, " %02x", ldub(ptr + i));
qemu_log(" %02x", ldub(ptr + i));
}
fprintf(logfile, "\n");
qemu_log("\n");
}
#endif
count++;
@ -2956,22 +2956,22 @@ void do_interrupt(CPUState *env)
name = "Unknown";
}
fprintf(logfile, "%6d: %s (v=%02x) pc=%08x npc=%08x SP=%08x\n",
qemu_log("%6d: %s (v=%02x) pc=%08x npc=%08x SP=%08x\n",
count, name, intno,
env->pc,
env->npc, env->regwptr[6]);
cpu_dump_state(env, logfile, fprintf, 0);
log_cpu_state(env, 0);
#if 0
{
int i;
uint8_t *ptr;
fprintf(logfile, " code=");
qemu_log(" code=");
ptr = (uint8_t *)env->pc;
for(i = 0; i < 16; i++) {
fprintf(logfile, " %02x", ldub(ptr + i));
qemu_log(" %02x", ldub(ptr + i));
}
fprintf(logfile, "\n");
qemu_log("\n");
}
#endif
count++;

15
target-sparc/translate.c
View File

@ -4829,8 +4829,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
}
}
if (spc) {
if (loglevel > 0)
fprintf(logfile, "Search PC...\n");
qemu_log("Search PC...\n");
j = gen_opc_ptr - gen_opc_buf;
if (lj < j) {
lj++;
@ -4897,9 +4896,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
while (lj <= j)
gen_opc_instr_start[lj++] = 0;
#if 0
if (loglevel > 0) {
page_dump(logfile);
}
log_page_dump();
#endif
gen_opc_jump_pc[0] = dc->jump_pc[0];
gen_opc_jump_pc[1] = dc->jump_pc[1];
@ -4909,10 +4906,10 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
}
#ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "--------------\n");
fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
target_disas(logfile, pc_start, last_pc + 4 - pc_start, 0);
fprintf(logfile, "\n");
qemu_log("--------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(pc_start, last_pc + 4 - pc_start, 0);
qemu_log("\n");
}
#endif
}

8
tcg/tcg.c
View File

@ -1879,9 +1879,9 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
#ifdef DEBUG_DISAS
if (unlikely(loglevel & CPU_LOG_TB_OP)) {
fprintf(logfile, "OP:\n");
qemu_log("OP:\n");
tcg_dump_ops(s, logfile);
fprintf(logfile, "\n");
qemu_log("\n");
}
#endif
@ -1895,9 +1895,9 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
#ifdef DEBUG_DISAS
if (unlikely(loglevel & CPU_LOG_TB_OP_OPT)) {
fprintf(logfile, "OP after la:\n");
qemu_log("OP after la:\n");
tcg_dump_ops(s, logfile);
fprintf(logfile, "\n");
qemu_log("\n");
}
#endif

6
translate-all.c
View File

@ -128,9 +128,9 @@ int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
#ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_OUT_ASM) {
fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
disas(logfile, tb->tc_ptr, *gen_code_size_ptr);
fprintf(logfile, "\n");
qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
log_disas(tb->tc_ptr, *gen_code_size_ptr);
qemu_log("\n");
fflush(logfile);
}
#endif

5
vl.c
View File

@ -156,10 +156,7 @@
#ifdef DEBUG_IOPORT
# define LOG_IOPORT(...) do { \
if (loglevel & CPU_LOG_IOPORT) \
fprintf(logfile, ## __VA_ARGS__); \
} while (0)
# define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
#else
# define LOG_IOPORT(...) do { } while (0)
#endif