mirror of https://github.com/xemu-project/xemu.git
target/arm: Split compute_fsr_fsc out of arm_deliver_fault
We will reuse this section of arm_deliver_fault for raising pc alignment faults. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -49,25 +49,11 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
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return syn;
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}
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static void QEMU_NORETURN arm_deliver_fault(ARMCPU *cpu, vaddr addr,
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MMUAccessType access_type,
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int mmu_idx, ARMMMUFaultInfo *fi)
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static uint32_t compute_fsr_fsc(CPUARMState *env, ARMMMUFaultInfo *fi,
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int target_el, int mmu_idx, uint32_t *ret_fsc)
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{
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CPUARMState *env = &cpu->env;
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int target_el;
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bool same_el;
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uint32_t syn, exc, fsr, fsc;
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ARMMMUIdx arm_mmu_idx = core_to_arm_mmu_idx(env, mmu_idx);
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target_el = exception_target_el(env);
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if (fi->stage2) {
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target_el = 2;
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env->cp15.hpfar_el2 = extract64(fi->s2addr, 12, 47) << 4;
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if (arm_is_secure_below_el3(env) && fi->s1ns) {
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env->cp15.hpfar_el2 |= HPFAR_NS;
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}
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}
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same_el = (arm_current_el(env) == target_el);
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uint32_t fsr, fsc;
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if (target_el == 2 || arm_el_is_aa64(env, target_el) ||
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arm_s1_regime_using_lpae_format(env, arm_mmu_idx)) {
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@ -88,6 +74,31 @@ static void QEMU_NORETURN arm_deliver_fault(ARMCPU *cpu, vaddr addr,
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fsc = 0x3f;
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}
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*ret_fsc = fsc;
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return fsr;
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}
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static void QEMU_NORETURN arm_deliver_fault(ARMCPU *cpu, vaddr addr,
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MMUAccessType access_type,
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int mmu_idx, ARMMMUFaultInfo *fi)
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{
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CPUARMState *env = &cpu->env;
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int target_el;
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bool same_el;
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uint32_t syn, exc, fsr, fsc;
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target_el = exception_target_el(env);
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if (fi->stage2) {
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target_el = 2;
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env->cp15.hpfar_el2 = extract64(fi->s2addr, 12, 47) << 4;
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if (arm_is_secure_below_el3(env) && fi->s1ns) {
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env->cp15.hpfar_el2 |= HPFAR_NS;
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}
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}
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same_el = (arm_current_el(env) == target_el);
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fsr = compute_fsr_fsc(env, fi, target_el, mmu_idx, &fsc);
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if (access_type == MMU_INST_FETCH) {
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syn = syn_insn_abort(same_el, fi->ea, fi->s1ptw, fsc);
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exc = EXCP_PREFETCH_ABORT;
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