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hw/loongarch/virt: Add cpu arch_id support 

With acpi madt table, there is cpu physical coreid, which may
be different with logical id in qemu. This patch adds cpu arch_id
support, and fill madt table with arch_id. For the present cpu
arch_id is still equal to logical id.

Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230613120552.2471420-2-zhaotianrui@loongson.cn>
This commit is contained in:
Tianrui Zhao 2023-05-16 16:27:57 +08:00 committed by Song Gao
parent 7efd65423a
commit 8f30771ce6
No known key found for this signature in database
GPG Key ID: 40A2FFF239263EDF
2 changed files with 46 additions and 8 deletions
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20
hw/loongarch/acpi-build.c
View File

@ -107,7 +107,9 @@ static void
build_madt(GArray *table_data, BIOSLinker *linker, LoongArchMachineState *lams)
{
MachineState *ms = MACHINE(lams);
int i;
MachineClass *mc = MACHINE_GET_CLASS(ms);
const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
int i, arch_id;
AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = lams->oem_id,
.oem_table_id = lams->oem_table_id };
@ -117,13 +119,15 @@ build_madt(GArray *table_data, BIOSLinker *linker, LoongArchMachineState *lams)
build_append_int_noprefix(table_data, 0, 4);
build_append_int_noprefix(table_data, 1 /* PCAT_COMPAT */, 4); /* Flags */
for (i = 0; i < ms->smp.cpus; i++) {
for (i = 0; i < arch_ids->len; i++) {
/* Processor Core Interrupt Controller Structure */
arch_id = arch_ids->cpus[i].arch_id;
build_append_int_noprefix(table_data, 17, 1); /* Type */
build_append_int_noprefix(table_data, 15, 1); /* Length */
build_append_int_noprefix(table_data, 1, 1); /* Version */
build_append_int_noprefix(table_data, i + 1, 4); /* ACPI Processor ID */
build_append_int_noprefix(table_data, i, 4); /* Core ID */
build_append_int_noprefix(table_data, arch_id, 4); /* Core ID */
build_append_int_noprefix(table_data, 1, 4); /* Flags */
}
@ -159,9 +163,11 @@ build_madt(GArray *table_data, BIOSLinker *linker, LoongArchMachineState *lams)
static void
build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
{
uint64_t i;
int i, arch_id;
LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
MachineState *ms = MACHINE(lams);
MachineClass *mc = MACHINE_GET_CLASS(ms);
const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
AcpiTable table = { .sig = "SRAT", .rev = 1, .oem_id = lams->oem_id,
.oem_table_id = lams->oem_table_id };
@ -169,13 +175,15 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
build_append_int_noprefix(table_data, 1, 4); /* Reserved */
build_append_int_noprefix(table_data, 0, 8); /* Reserved */
for (i = 0; i < ms->smp.cpus; ++i) {
for (i = 0; i < arch_ids->len; ++i) {
arch_id = arch_ids->cpus[i].arch_id;
/* Processor Local APIC/SAPIC Affinity Structure */
build_append_int_noprefix(table_data, 0, 1); /* Type */
build_append_int_noprefix(table_data, 16, 1); /* Length */
/* Proximity Domain [7:0] */
build_append_int_noprefix(table_data, 0, 1);
build_append_int_noprefix(table_data, i, 1); /* APIC ID */
build_append_int_noprefix(table_data, arch_id, 1); /* APIC ID */
/* Flags, Table 5-36 */
build_append_int_noprefix(table_data, 1, 4);
build_append_int_noprefix(table_data, 0, 1); /* Local SAPIC EID */

34
hw/loongarch/virt.c
View File

@ -771,6 +771,9 @@ static void loongarch_init(MachineState *machine)
LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
int i;
hwaddr fdt_base;
const CPUArchIdList *possible_cpus;
MachineClass *mc = MACHINE_GET_CLASS(machine);
CPUState *cpu;
if (!cpu_model) {
cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
@ -787,8 +790,12 @@ static void loongarch_init(MachineState *machine)
}
create_fdt(lams);
/* Init CPUs */
for (i = 0; i < machine->smp.cpus; i++) {
cpu_create(machine->cpu_type);
possible_cpus = mc->possible_cpu_arch_ids(machine);
for (i = 0; i < possible_cpus->len; i++) {
cpu = cpu_create(machine->cpu_type);
cpu->cpu_index = i;
machine->possible_cpus->cpus[i].cpu = OBJECT(cpu);
}
fdt_add_cpu_nodes(lams);
/* Add memory region */
@ -1022,6 +1029,28 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine,
return NULL;
}
static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms)
{
int n;
unsigned int max_cpus = ms->smp.max_cpus;
if (ms->possible_cpus) {
assert(ms->possible_cpus->len == max_cpus);
return ms->possible_cpus;
}
ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
sizeof(CPUArchId) * max_cpus);
ms->possible_cpus->len = max_cpus;
for (n = 0; n < ms->possible_cpus->len; n++) {
ms->possible_cpus->cpus[n].type = ms->cpu_type;
ms->possible_cpus->cpus[n].arch_id = n;
ms->possible_cpus->cpus[n].props.has_core_id = true;
ms->possible_cpus->cpus[n].props.core_id = n % ms->smp.cores;
}
return ms->possible_cpus;
}
static void loongarch_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@ -1038,6 +1067,7 @@ static void loongarch_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_VIRTIO;
mc->default_boot_order = "c";
mc->no_cdrom = 1;
mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids;
mc->get_hotplug_handler = virt_machine_get_hotplug_handler;
mc->default_nic = "virtio-net-pci";
hc->plug = loongarch_machine_device_plug_cb;