mirror of https://github.com/xemu-project/xemu.git
mcpx/dsp: Move some debug functions out to debug.c
This commit is contained in:
parent
d18125994c
commit
8dafd513b9
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@ -0,0 +1,312 @@
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/*
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* MCPX DSP emulator
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*
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* Copyright (c) 2015 espes
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* Copyright (c) 2020-2025 Matt Borgerson
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*
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* Adapted from Hatari DSP M56001 emulation
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* (C) 2001-2008 ARAnyM developer team
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* Adaption to Hatari (C) 2008 by Thomas Huth
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "qemu/osdep.h"
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#include <stdlib.h>
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#include <ctype.h>
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#include <string.h>
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#include <assert.h>
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#include "dsp_cpu.h"
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#include "dsp_dma.h"
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#include "dsp_state.h"
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#include "dsp.h"
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#include "debug.h"
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#if DEBUG_DSP
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#define BITMASK(x) ((1<<(x))-1)
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/**
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* Disassemble DSP code between given addresses, return next PC address
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*/
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uint32_t dsp_disasm_address(DSPState* dsp, FILE *out, uint32_t lowerAdr, uint32_t UpperAdr)
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{
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uint32_t dsp_pc;
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for (dsp_pc=lowerAdr; dsp_pc<=UpperAdr; dsp_pc++) {
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dsp_pc += dsp56k_execute_one_disasm_instruction(&dsp->core, out, dsp_pc);
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}
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return dsp_pc;
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}
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/**
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* Output memory values between given addresses in given DSP address space.
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* Return next DSP address value.
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*/
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uint32_t dsp_disasm_memory(DSPState* dsp, uint32_t dsp_memdump_addr, uint32_t dsp_memdump_upper, char space)
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{
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uint32_t mem, value;
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for (mem = dsp_memdump_addr; mem <= dsp_memdump_upper; mem++) {
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value = dsp_read_memory(dsp, space, mem);
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printf("%04x %06x\n", mem, value);
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}
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return dsp_memdump_upper+1;
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}
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/**
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* Show information on DSP core state which isn't
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* shown by any of the other commands (dd, dm, dr).
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*/
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void dsp_info(DSPState* dsp)
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{
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int i, j;
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const char *stackname[] = { "SSH", "SSL" };
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printf("DSP core information:\n");
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for (i = 0; i < ARRAY_SIZE(stackname); i++) {
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printf("- %s stack:", stackname[i]);
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for (j = 0; j < ARRAY_SIZE(dsp->core.stack[0]); j++) {
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printf(" %04x", dsp->core.stack[i][j]);
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}
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printf("\n");
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}
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printf("- Interrupt IPL:");
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for (i = 0; i < ARRAY_SIZE(dsp->core.interrupt_ipl); i++) {
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printf(" %04x", dsp->core.interrupt_ipl[i]);
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}
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printf("\n");
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printf("- Pending ints: ");
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for (i = 0; i < ARRAY_SIZE(dsp->core.interrupt_is_pending); i++) {
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printf(" %04hx", dsp->core.interrupt_is_pending[i]);
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}
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printf("\n");
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}
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/**
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* Show DSP register contents
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*/
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void dsp_print_registers(DSPState* dsp)
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{
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uint32_t i;
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printf("A: A2: %02x A1: %06x A0: %06x\n",
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dsp->core.registers[DSP_REG_A2], dsp->core.registers[DSP_REG_A1], dsp->core.registers[DSP_REG_A0]);
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printf("B: B2: %02x B1: %06x B0: %06x\n",
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dsp->core.registers[DSP_REG_B2], dsp->core.registers[DSP_REG_B1], dsp->core.registers[DSP_REG_B0]);
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printf("X: X1: %06x X0: %06x\n", dsp->core.registers[DSP_REG_X1], dsp->core.registers[DSP_REG_X0]);
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printf("Y: Y1: %06x Y0: %06x\n", dsp->core.registers[DSP_REG_Y1], dsp->core.registers[DSP_REG_Y0]);
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for (i=0; i<8; i++) {
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printf("R%01x: %04x N%01x: %04x M%01x: %04x\n",
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i, dsp->core.registers[DSP_REG_R0+i],
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i, dsp->core.registers[DSP_REG_N0+i],
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i, dsp->core.registers[DSP_REG_M0+i]);
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}
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printf("LA: %04x LC: %04x PC: %04x\n", dsp->core.registers[DSP_REG_LA], dsp->core.registers[DSP_REG_LC], dsp->core.pc);
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printf("SR: %04x OMR: %02x\n", dsp->core.registers[DSP_REG_SR], dsp->core.registers[DSP_REG_OMR]);
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printf("SP: %02x SSH: %04x SSL: %04x\n",
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dsp->core.registers[DSP_REG_SP], dsp->core.registers[DSP_REG_SSH], dsp->core.registers[DSP_REG_SSL]);
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}
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/**
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* Get given DSP register address and required bit mask.
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* Works for A0-2, B0-2, LA, LC, M0-7, N0-7, R0-7, X0-1, Y0-1, PC, SR, SP,
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* OMR, SSH & SSL registers, but note that the SP, SSH & SSL registers
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* need special handling (in DSP*SetRegister()) when they are set.
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* Return the register width in bits or zero for an error.
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*/
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int dsp_get_register_address(DSPState* dsp, const char *regname, uint32_t **addr, uint32_t *mask)
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{
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#define MAX_REGNAME_LEN 4
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typedef struct {
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const char name[MAX_REGNAME_LEN];
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uint32_t *addr;
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size_t bits;
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uint32_t mask;
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} reg_addr_t;
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/* sorted by name so that this can be bisected */
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const reg_addr_t registers[] = {
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/* 56-bit A register */
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{ "A0", &dsp->core.registers[DSP_REG_A0], 32, BITMASK(24) },
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{ "A1", &dsp->core.registers[DSP_REG_A1], 32, BITMASK(24) },
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{ "A2", &dsp->core.registers[DSP_REG_A2], 32, BITMASK(8) },
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/* 56-bit B register */
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{ "B0", &dsp->core.registers[DSP_REG_B0], 32, BITMASK(24) },
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{ "B1", &dsp->core.registers[DSP_REG_B1], 32, BITMASK(24) },
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{ "B2", &dsp->core.registers[DSP_REG_B2], 32, BITMASK(8) },
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/* 16-bit LA & LC registers */
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{ "LA", &dsp->core.registers[DSP_REG_LA], 32, BITMASK(16) },
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{ "LC", &dsp->core.registers[DSP_REG_LC], 32, BITMASK(16) },
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/* 16-bit M registers */
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{ "M0", &dsp->core.registers[DSP_REG_M0], 32, BITMASK(16) },
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{ "M1", &dsp->core.registers[DSP_REG_M1], 32, BITMASK(16) },
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{ "M2", &dsp->core.registers[DSP_REG_M2], 32, BITMASK(16) },
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{ "M3", &dsp->core.registers[DSP_REG_M3], 32, BITMASK(16) },
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{ "M4", &dsp->core.registers[DSP_REG_M4], 32, BITMASK(16) },
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{ "M5", &dsp->core.registers[DSP_REG_M5], 32, BITMASK(16) },
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{ "M6", &dsp->core.registers[DSP_REG_M6], 32, BITMASK(16) },
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{ "M7", &dsp->core.registers[DSP_REG_M7], 32, BITMASK(16) },
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/* 16-bit N registers */
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{ "N0", &dsp->core.registers[DSP_REG_N0], 32, BITMASK(16) },
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{ "N1", &dsp->core.registers[DSP_REG_N1], 32, BITMASK(16) },
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{ "N2", &dsp->core.registers[DSP_REG_N2], 32, BITMASK(16) },
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{ "N3", &dsp->core.registers[DSP_REG_N3], 32, BITMASK(16) },
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{ "N4", &dsp->core.registers[DSP_REG_N4], 32, BITMASK(16) },
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{ "N5", &dsp->core.registers[DSP_REG_N5], 32, BITMASK(16) },
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{ "N6", &dsp->core.registers[DSP_REG_N6], 32, BITMASK(16) },
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{ "N7", &dsp->core.registers[DSP_REG_N7], 32, BITMASK(16) },
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{ "OMR", &dsp->core.registers[DSP_REG_OMR], 32, 0x5f },
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/* 16-bit program counter */
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{ "PC", (uint32_t*)(&dsp->core.pc), 24, BITMASK(24) },
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/* 16-bit DSP R (address) registers */
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{ "R0", &dsp->core.registers[DSP_REG_R0], 32, BITMASK(16) },
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{ "R1", &dsp->core.registers[DSP_REG_R1], 32, BITMASK(16) },
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{ "R2", &dsp->core.registers[DSP_REG_R2], 32, BITMASK(16) },
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{ "R3", &dsp->core.registers[DSP_REG_R3], 32, BITMASK(16) },
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{ "R4", &dsp->core.registers[DSP_REG_R4], 32, BITMASK(16) },
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{ "R5", &dsp->core.registers[DSP_REG_R5], 32, BITMASK(16) },
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{ "R6", &dsp->core.registers[DSP_REG_R6], 32, BITMASK(16) },
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{ "R7", &dsp->core.registers[DSP_REG_R7], 32, BITMASK(16) },
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{ "SSH", &dsp->core.registers[DSP_REG_SSH], 32, BITMASK(16) },
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{ "SSL", &dsp->core.registers[DSP_REG_SSL], 32, BITMASK(16) },
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{ "SP", &dsp->core.registers[DSP_REG_SP], 32, BITMASK(6) },
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/* 16-bit status register */
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{ "SR", &dsp->core.registers[DSP_REG_SR], 32, 0xefff },
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/* 48-bit X register */
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{ "X0", &dsp->core.registers[DSP_REG_X0], 32, BITMASK(24) },
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{ "X1", &dsp->core.registers[DSP_REG_X1], 32, BITMASK(24) },
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/* 48-bit Y register */
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{ "Y0", &dsp->core.registers[DSP_REG_Y0], 32, BITMASK(24) },
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{ "Y1", &dsp->core.registers[DSP_REG_Y1], 32, BITMASK(24) }
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};
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/* left, right, middle, direction */
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int l, r, m, dir = 0;
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unsigned int i, len;
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char reg[MAX_REGNAME_LEN];
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for (i = 0; i < sizeof(reg) && regname[i]; i++) {
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reg[i] = toupper(regname[i]);
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}
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if (i < 2 || regname[i]) {
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/* too short or longer than any of the names */
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return 0;
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}
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len = i;
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/* bisect */
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l = 0;
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r = ARRAY_SIZE(registers) - 1;
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do {
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m = (l+r) >> 1;
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for (i = 0; i < len; i++) {
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dir = (int)reg[i] - registers[m].name[i];
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if (dir) {
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break;
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}
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}
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if (dir == 0) {
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*addr = registers[m].addr;
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*mask = registers[m].mask;
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return registers[m].bits;
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}
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if (dir < 0) {
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r = m-1;
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} else {
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l = m+1;
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}
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} while (l <= r);
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#undef MAX_REGNAME_LEN
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return 0;
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}
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/**
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* Set given DSP register value, return false if unknown register given
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*/
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bool dsp_disasm_set_register(DSPState* dsp, const char *arg, uint32_t value)
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{
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uint32_t *addr, mask, sp_value;
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int bits;
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/* first check registers needing special handling... */
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if (arg[0]=='S' || arg[0]=='s') {
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if (arg[1]=='P' || arg[1]=='p') {
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dsp->core.registers[DSP_REG_SP] = value & BITMASK(6);
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value &= BITMASK(4);
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dsp->core.registers[DSP_REG_SSH] = dsp->core.stack[0][value];
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dsp->core.registers[DSP_REG_SSL] = dsp->core.stack[1][value];
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return true;
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}
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if (arg[1]=='S' || arg[1]=='s') {
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sp_value = dsp->core.registers[DSP_REG_SP] & BITMASK(4);
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if (arg[2]=='H' || arg[2]=='h') {
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if (sp_value == 0) {
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dsp->core.registers[DSP_REG_SSH] = 0;
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dsp->core.stack[0][sp_value] = 0;
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} else {
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dsp->core.registers[DSP_REG_SSH] = value & BITMASK(16);
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dsp->core.stack[0][sp_value] = value & BITMASK(16);
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}
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return true;
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}
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if (arg[2]=='L' || arg[2]=='l') {
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if (sp_value == 0) {
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dsp->core.registers[DSP_REG_SSL] = 0;
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dsp->core.stack[1][sp_value] = 0;
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} else {
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dsp->core.registers[DSP_REG_SSL] = value & BITMASK(16);
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dsp->core.stack[1][sp_value] = value & BITMASK(16);
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}
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return true;
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}
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}
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}
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/* ...then registers where address & mask are enough */
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bits = dsp_get_register_address(dsp, arg, &addr, &mask);
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switch (bits) {
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case 32:
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*addr = value & mask;
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return true;
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case 16:
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*(uint16_t*)addr = value & mask;
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return true;
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}
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return false;
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}
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#endif
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@ -198,19 +198,6 @@ void dsp_start_frame(DSPState* dsp)
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dsp->interrupts |= INTERRUPT_START_FRAME;
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}
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/**
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* Disassemble DSP code between given addresses, return next PC address
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*/
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uint32_t dsp_disasm_address(DSPState* dsp, FILE *out, uint32_t lowerAdr, uint32_t UpperAdr)
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{
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uint32_t dsp_pc;
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for (dsp_pc=lowerAdr; dsp_pc<=UpperAdr; dsp_pc++) {
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dsp_pc += dsp56k_execute_one_disasm_instruction(&dsp->core, out, dsp_pc);
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}
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return dsp_pc;
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}
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uint32_t dsp_read_memory(DSPState* dsp, char space, uint32_t address)
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{
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int space_id;
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@ -254,259 +241,3 @@ void dsp_write_memory(DSPState* dsp, char space, uint32_t address, uint32_t valu
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dsp56k_write_memory(&dsp->core, space_id, address, value);
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}
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/**
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* Output memory values between given addresses in given DSP address space.
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* Return next DSP address value.
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*/
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uint32_t dsp_disasm_memory(DSPState* dsp, uint32_t dsp_memdump_addr, uint32_t dsp_memdump_upper, char space)
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{
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uint32_t mem, value;
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for (mem = dsp_memdump_addr; mem <= dsp_memdump_upper; mem++) {
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value = dsp_read_memory(dsp, space, mem);
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printf("%04x %06x\n", mem, value);
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}
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return dsp_memdump_upper+1;
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}
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/**
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* Show information on DSP core state which isn't
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* shown by any of the other commands (dd, dm, dr).
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*/
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void dsp_info(DSPState* dsp)
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{
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int i, j;
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const char *stackname[] = { "SSH", "SSL" };
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printf("DSP core information:\n");
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for (i = 0; i < ARRAY_SIZE(stackname); i++) {
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printf("- %s stack:", stackname[i]);
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for (j = 0; j < ARRAY_SIZE(dsp->core.stack[0]); j++) {
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printf(" %04x", dsp->core.stack[i][j]);
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}
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printf("\n");
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}
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printf("- Interrupt IPL:");
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for (i = 0; i < ARRAY_SIZE(dsp->core.interrupt_ipl); i++) {
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printf(" %04x", dsp->core.interrupt_ipl[i]);
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}
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printf("\n");
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printf("- Pending ints: ");
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for (i = 0; i < ARRAY_SIZE(dsp->core.interrupt_is_pending); i++) {
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printf(" %04hx", dsp->core.interrupt_is_pending[i]);
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}
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printf("\n");
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}
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/**
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* Show DSP register contents
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*/
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void dsp_print_registers(DSPState* dsp)
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{
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uint32_t i;
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printf("A: A2: %02x A1: %06x A0: %06x\n",
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dsp->core.registers[DSP_REG_A2], dsp->core.registers[DSP_REG_A1], dsp->core.registers[DSP_REG_A0]);
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printf("B: B2: %02x B1: %06x B0: %06x\n",
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dsp->core.registers[DSP_REG_B2], dsp->core.registers[DSP_REG_B1], dsp->core.registers[DSP_REG_B0]);
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printf("X: X1: %06x X0: %06x\n", dsp->core.registers[DSP_REG_X1], dsp->core.registers[DSP_REG_X0]);
|
||||
printf("Y: Y1: %06x Y0: %06x\n", dsp->core.registers[DSP_REG_Y1], dsp->core.registers[DSP_REG_Y0]);
|
||||
|
||||
for (i=0; i<8; i++) {
|
||||
printf("R%01x: %04x N%01x: %04x M%01x: %04x\n",
|
||||
i, dsp->core.registers[DSP_REG_R0+i],
|
||||
i, dsp->core.registers[DSP_REG_N0+i],
|
||||
i, dsp->core.registers[DSP_REG_M0+i]);
|
||||
}
|
||||
|
||||
printf("LA: %04x LC: %04x PC: %04x\n", dsp->core.registers[DSP_REG_LA], dsp->core.registers[DSP_REG_LC], dsp->core.pc);
|
||||
printf("SR: %04x OMR: %02x\n", dsp->core.registers[DSP_REG_SR], dsp->core.registers[DSP_REG_OMR]);
|
||||
printf("SP: %02x SSH: %04x SSL: %04x\n",
|
||||
dsp->core.registers[DSP_REG_SP], dsp->core.registers[DSP_REG_SSH], dsp->core.registers[DSP_REG_SSL]);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Get given DSP register address and required bit mask.
|
||||
* Works for A0-2, B0-2, LA, LC, M0-7, N0-7, R0-7, X0-1, Y0-1, PC, SR, SP,
|
||||
* OMR, SSH & SSL registers, but note that the SP, SSH & SSL registers
|
||||
* need special handling (in DSP*SetRegister()) when they are set.
|
||||
* Return the register width in bits or zero for an error.
|
||||
*/
|
||||
int dsp_get_register_address(DSPState* dsp, const char *regname, uint32_t **addr, uint32_t *mask)
|
||||
{
|
||||
#define MAX_REGNAME_LEN 4
|
||||
typedef struct {
|
||||
const char name[MAX_REGNAME_LEN];
|
||||
uint32_t *addr;
|
||||
size_t bits;
|
||||
uint32_t mask;
|
||||
} reg_addr_t;
|
||||
|
||||
/* sorted by name so that this can be bisected */
|
||||
const reg_addr_t registers[] = {
|
||||
|
||||
/* 56-bit A register */
|
||||
{ "A0", &dsp->core.registers[DSP_REG_A0], 32, BITMASK(24) },
|
||||
{ "A1", &dsp->core.registers[DSP_REG_A1], 32, BITMASK(24) },
|
||||
{ "A2", &dsp->core.registers[DSP_REG_A2], 32, BITMASK(8) },
|
||||
|
||||
/* 56-bit B register */
|
||||
{ "B0", &dsp->core.registers[DSP_REG_B0], 32, BITMASK(24) },
|
||||
{ "B1", &dsp->core.registers[DSP_REG_B1], 32, BITMASK(24) },
|
||||
{ "B2", &dsp->core.registers[DSP_REG_B2], 32, BITMASK(8) },
|
||||
|
||||
/* 16-bit LA & LC registers */
|
||||
{ "LA", &dsp->core.registers[DSP_REG_LA], 32, BITMASK(16) },
|
||||
{ "LC", &dsp->core.registers[DSP_REG_LC], 32, BITMASK(16) },
|
||||
|
||||
/* 16-bit M registers */
|
||||
{ "M0", &dsp->core.registers[DSP_REG_M0], 32, BITMASK(16) },
|
||||
{ "M1", &dsp->core.registers[DSP_REG_M1], 32, BITMASK(16) },
|
||||
{ "M2", &dsp->core.registers[DSP_REG_M2], 32, BITMASK(16) },
|
||||
{ "M3", &dsp->core.registers[DSP_REG_M3], 32, BITMASK(16) },
|
||||
{ "M4", &dsp->core.registers[DSP_REG_M4], 32, BITMASK(16) },
|
||||
{ "M5", &dsp->core.registers[DSP_REG_M5], 32, BITMASK(16) },
|
||||
{ "M6", &dsp->core.registers[DSP_REG_M6], 32, BITMASK(16) },
|
||||
{ "M7", &dsp->core.registers[DSP_REG_M7], 32, BITMASK(16) },
|
||||
|
||||
/* 16-bit N registers */
|
||||
{ "N0", &dsp->core.registers[DSP_REG_N0], 32, BITMASK(16) },
|
||||
{ "N1", &dsp->core.registers[DSP_REG_N1], 32, BITMASK(16) },
|
||||
{ "N2", &dsp->core.registers[DSP_REG_N2], 32, BITMASK(16) },
|
||||
{ "N3", &dsp->core.registers[DSP_REG_N3], 32, BITMASK(16) },
|
||||
{ "N4", &dsp->core.registers[DSP_REG_N4], 32, BITMASK(16) },
|
||||
{ "N5", &dsp->core.registers[DSP_REG_N5], 32, BITMASK(16) },
|
||||
{ "N6", &dsp->core.registers[DSP_REG_N6], 32, BITMASK(16) },
|
||||
{ "N7", &dsp->core.registers[DSP_REG_N7], 32, BITMASK(16) },
|
||||
|
||||
{ "OMR", &dsp->core.registers[DSP_REG_OMR], 32, 0x5f },
|
||||
|
||||
/* 16-bit program counter */
|
||||
{ "PC", (uint32_t*)(&dsp->core.pc), 24, BITMASK(24) },
|
||||
|
||||
/* 16-bit DSP R (address) registers */
|
||||
{ "R0", &dsp->core.registers[DSP_REG_R0], 32, BITMASK(16) },
|
||||
{ "R1", &dsp->core.registers[DSP_REG_R1], 32, BITMASK(16) },
|
||||
{ "R2", &dsp->core.registers[DSP_REG_R2], 32, BITMASK(16) },
|
||||
{ "R3", &dsp->core.registers[DSP_REG_R3], 32, BITMASK(16) },
|
||||
{ "R4", &dsp->core.registers[DSP_REG_R4], 32, BITMASK(16) },
|
||||
{ "R5", &dsp->core.registers[DSP_REG_R5], 32, BITMASK(16) },
|
||||
{ "R6", &dsp->core.registers[DSP_REG_R6], 32, BITMASK(16) },
|
||||
{ "R7", &dsp->core.registers[DSP_REG_R7], 32, BITMASK(16) },
|
||||
|
||||
{ "SSH", &dsp->core.registers[DSP_REG_SSH], 32, BITMASK(16) },
|
||||
{ "SSL", &dsp->core.registers[DSP_REG_SSL], 32, BITMASK(16) },
|
||||
{ "SP", &dsp->core.registers[DSP_REG_SP], 32, BITMASK(6) },
|
||||
|
||||
/* 16-bit status register */
|
||||
{ "SR", &dsp->core.registers[DSP_REG_SR], 32, 0xefff },
|
||||
|
||||
/* 48-bit X register */
|
||||
{ "X0", &dsp->core.registers[DSP_REG_X0], 32, BITMASK(24) },
|
||||
{ "X1", &dsp->core.registers[DSP_REG_X1], 32, BITMASK(24) },
|
||||
|
||||
/* 48-bit Y register */
|
||||
{ "Y0", &dsp->core.registers[DSP_REG_Y0], 32, BITMASK(24) },
|
||||
{ "Y1", &dsp->core.registers[DSP_REG_Y1], 32, BITMASK(24) }
|
||||
};
|
||||
/* left, right, middle, direction */
|
||||
int l, r, m, dir = 0;
|
||||
unsigned int i, len;
|
||||
char reg[MAX_REGNAME_LEN];
|
||||
|
||||
for (i = 0; i < sizeof(reg) && regname[i]; i++) {
|
||||
reg[i] = toupper(regname[i]);
|
||||
}
|
||||
if (i < 2 || regname[i]) {
|
||||
/* too short or longer than any of the names */
|
||||
return 0;
|
||||
}
|
||||
len = i;
|
||||
|
||||
/* bisect */
|
||||
l = 0;
|
||||
r = ARRAY_SIZE(registers) - 1;
|
||||
do {
|
||||
m = (l+r) >> 1;
|
||||
for (i = 0; i < len; i++) {
|
||||
dir = (int)reg[i] - registers[m].name[i];
|
||||
if (dir) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (dir == 0) {
|
||||
*addr = registers[m].addr;
|
||||
*mask = registers[m].mask;
|
||||
return registers[m].bits;
|
||||
}
|
||||
if (dir < 0) {
|
||||
r = m-1;
|
||||
} else {
|
||||
l = m+1;
|
||||
}
|
||||
} while (l <= r);
|
||||
#undef MAX_REGNAME_LEN
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Set given DSP register value, return false if unknown register given
|
||||
*/
|
||||
bool dsp_disasm_set_register(DSPState* dsp, const char *arg, uint32_t value)
|
||||
{
|
||||
uint32_t *addr, mask, sp_value;
|
||||
int bits;
|
||||
|
||||
/* first check registers needing special handling... */
|
||||
if (arg[0]=='S' || arg[0]=='s') {
|
||||
if (arg[1]=='P' || arg[1]=='p') {
|
||||
dsp->core.registers[DSP_REG_SP] = value & BITMASK(6);
|
||||
value &= BITMASK(4);
|
||||
dsp->core.registers[DSP_REG_SSH] = dsp->core.stack[0][value];
|
||||
dsp->core.registers[DSP_REG_SSL] = dsp->core.stack[1][value];
|
||||
return true;
|
||||
}
|
||||
if (arg[1]=='S' || arg[1]=='s') {
|
||||
sp_value = dsp->core.registers[DSP_REG_SP] & BITMASK(4);
|
||||
if (arg[2]=='H' || arg[2]=='h') {
|
||||
if (sp_value == 0) {
|
||||
dsp->core.registers[DSP_REG_SSH] = 0;
|
||||
dsp->core.stack[0][sp_value] = 0;
|
||||
} else {
|
||||
dsp->core.registers[DSP_REG_SSH] = value & BITMASK(16);
|
||||
dsp->core.stack[0][sp_value] = value & BITMASK(16);
|
||||
}
|
||||
return true;
|
||||
}
|
||||
if (arg[2]=='L' || arg[2]=='l') {
|
||||
if (sp_value == 0) {
|
||||
dsp->core.registers[DSP_REG_SSL] = 0;
|
||||
dsp->core.stack[1][sp_value] = 0;
|
||||
} else {
|
||||
dsp->core.registers[DSP_REG_SSL] = value & BITMASK(16);
|
||||
dsp->core.stack[1][sp_value] = value & BITMASK(16);
|
||||
}
|
||||
return true;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* ...then registers where address & mask are enough */
|
||||
bits = dsp_get_register_address(dsp, arg, &addr, &mask);
|
||||
switch (bits) {
|
||||
case 32:
|
||||
*addr = value & mask;
|
||||
return true;
|
||||
case 16:
|
||||
*(uint16_t*)addr = value & mask;
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
|
|
@ -36,7 +36,6 @@ typedef void (*dsp_scratch_rw_func)(
|
|||
typedef void (*dsp_fifo_rw_func)(
|
||||
void *opaque, uint8_t *ptr, unsigned int index, size_t len, bool dir);
|
||||
|
||||
/* Dsp commands */
|
||||
DSPState *dsp_init(void *rw_opaque,
|
||||
dsp_scratch_rw_func scratch_rw,
|
||||
dsp_fifo_rw_func fifo_rw);
|
||||
|
@ -49,16 +48,14 @@ void dsp_run(DSPState* dsp, int cycles);
|
|||
void dsp_bootstrap(DSPState* dsp);
|
||||
void dsp_start_frame(DSPState* dsp);
|
||||
|
||||
|
||||
/* Dsp Debugger commands */
|
||||
uint32_t dsp_read_memory(DSPState* dsp, char space, uint32_t addr);
|
||||
void dsp_write_memory(DSPState* dsp, char space, uint32_t address, uint32_t value);
|
||||
uint32_t dsp_disasm_memory(DSPState* dsp, uint32_t dsp_memdump_addr, uint32_t dsp_memdump_upper, char space);
|
||||
uint32_t dsp_disasm_address(DSPState* dsp, FILE *out, uint32_t lowerAdr, uint32_t UpperAdr);
|
||||
|
||||
void dsp_info(DSPState* dsp);
|
||||
void dsp_print_registers(DSPState* dsp);
|
||||
int dsp_get_register_address(DSPState* dsp, const char *arg, uint32_t **addr, uint32_t *mask);
|
||||
uint32_t dsp_disasm_memory(DSPState* dsp, uint32_t dsp_memdump_addr, uint32_t dsp_memdump_upper, char space);
|
||||
uint32_t dsp_disasm_address(DSPState* dsp, FILE *out, uint32_t lowerAdr, uint32_t UpperAdr);
|
||||
bool dsp_disasm_set_register(DSPState* dsp, const char *arg, uint32_t value);
|
||||
|
||||
|
||||
#endif /* DSP_H */
|
||||
|
|
|
@ -1439,5 +1439,3 @@ static uint32_t dsp_signextend(int bits, uint32_t v) {
|
|||
assert(shift > 0);
|
||||
return (uint32_t)(((int32_t)v << shift) >> shift);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -1,2 +1,2 @@
|
|||
libdsp = static_library('dsp', files(['dsp.c', 'dsp_cpu.c', 'dsp_dma.c']) + genh)
|
||||
libdsp = static_library('dsp', files(['debug.c', 'dsp.c', 'dsp_cpu.c', 'dsp_dma.c']) + genh)
|
||||
dsp = declare_dependency(objects: libdsp.extract_all_objects(recursive: false))
|
||||
|
|
Loading…
Reference in New Issue