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v6.0.0-rc4 release 

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Merge tag 'v6.0.0-rc4' into merge/qemu-v6.0.0

v6.0.0-rc4 release
This commit is contained in:
Matt Borgerson 2021-04-20 10:22:42 -07:00
parent 6526d3b7b4 b1cffefa1b
commit 8acac97625
13 changed files with 70 additions and 37 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
VERSION
View File

@ -1 +1 @@
5.2.93
5.2.94

2
accel/tcg/translate-all.c
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@ -1863,7 +1863,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
if (phys_pc == -1) {
/* Generate a one-shot TB with 1 insn in it */
cflags = (cflags & ~CF_COUNT_MASK) | 1;
cflags = (cflags & ~CF_COUNT_MASK) | CF_LAST_IO | 1;
}
max_insns = cflags & CF_COUNT_MASK;

2
disas/arm-a64.cc
View File

@ -17,8 +17,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
extern "C" {
#include "qemu/osdep.h"
extern "C" {
#include "disas/dis-asm.h"
}

2
disas/nanomips.cpp
View File

@ -27,8 +27,8 @@
* Reference Manual", Revision 01.01, April 27, 2018
*/
extern "C" {
#include "qemu/osdep.h"
extern "C" {
#include "disas/dis-asm.h"
}

24
hw/arm/armsse.c
View File

@ -56,6 +56,7 @@ typedef struct ARMSSEDeviceInfo {
struct ARMSSEInfo {
const char *name;
const char *cpu_type;
uint32_t sse_version;
int sram_banks;
int num_cpus;
@ -84,7 +85,7 @@ static Property iotkit_properties[] = {
DEFINE_PROP_END_OF_LIST()
};
static Property armsse_properties[] = {
static Property sse200_properties[] = {
DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
@ -97,6 +98,17 @@ static Property armsse_properties[] = {
DEFINE_PROP_END_OF_LIST()
};
static Property sse300_properties[] = {
DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15),
DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000),
DEFINE_PROP_BOOL("CPU0_FPU", ARMSSE, cpu_fpu[0], true),
DEFINE_PROP_BOOL("CPU0_DSP", ARMSSE, cpu_dsp[0], true),
DEFINE_PROP_END_OF_LIST()
};
static const ARMSSEDeviceInfo iotkit_devices[] = {
{
.name = "timer0",
@ -490,6 +502,7 @@ static const ARMSSEInfo armsse_variants[] = {
{
.name = TYPE_IOTKIT,
.sse_version = ARMSSE_IOTKIT,
.cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"),
.sram_banks = 1,
.num_cpus = 1,
.sys_version = 0x41743,
@ -508,6 +521,7 @@ static const ARMSSEInfo armsse_variants[] = {
{
.name = TYPE_SSE200,
.sse_version = ARMSSE_SSE200,
.cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"),
.sram_banks = 4,
.num_cpus = 2,
.sys_version = 0x22041743,
@ -519,13 +533,14 @@ static const ARMSSEInfo armsse_variants[] = {
.has_cpuid = true,
.has_cpu_pwrctrl = false,
.has_sse_counter = false,
.props = armsse_properties,
.props = sse200_properties,
.devinfo = sse200_devices,
.irq_is_common = sse200_irq_is_common,
},
{
.name = TYPE_SSE300,
.sse_version = ARMSSE_SSE300,
.cpu_type = ARM_CPU_TYPE_NAME("cortex-m55"),
.sram_banks = 2,
.num_cpus = 1,
.sys_version = 0x7e00043b,
@ -537,7 +552,7 @@ static const ARMSSEInfo armsse_variants[] = {
.has_cpuid = true,
.has_cpu_pwrctrl = true,
.has_sse_counter = true,
.props = armsse_properties,
.props = sse300_properties,
.devinfo = sse300_devices,
.irq_is_common = sse300_irq_is_common,
},
@ -708,8 +723,7 @@ static void armsse_init(Object *obj)
name = g_strdup_printf("armv7m%d", i);
object_initialize_child(OBJECT(&s->cluster[i]), name, &s->armv7m[i],
TYPE_ARMV7M);
qdev_prop_set_string(DEVICE(&s->armv7m[i]), "cpu-type",
ARM_CPU_TYPE_NAME("cortex-m33"));
qdev_prop_set_string(DEVICE(&s->armv7m[i]), "cpu-type", info->cpu_type);
g_free(name);
name = g_strdup_printf("arm-sse-cpu-container%d", i);
memory_region_init(&s->cpu_container[i], obj, name, UINT64_MAX);

6
hw/scsi/mptsas.c
View File

@ -251,13 +251,10 @@ static int mptsas_build_sgl(MPTSASState *s, MPTSASRequest *req, hwaddr addr)
static void mptsas_free_request(MPTSASRequest *req)
{
MPTSASState *s = req->dev;
if (req->sreq != NULL) {
req->sreq->hba_private = NULL;
scsi_req_unref(req->sreq);
req->sreq = NULL;
QTAILQ_REMOVE(&s->pending, req, next);
}
qemu_sglist_destroy(&req->qsg);
g_free(req);
@ -303,7 +300,6 @@ static int mptsas_process_scsi_io_request(MPTSASState *s,
}
req = g_new0(MPTSASRequest, 1);
QTAILQ_INSERT_TAIL(&s->pending, req, next);
req->scsi_io = *scsi_io;
req->dev = s;
@ -1319,8 +1315,6 @@ static void mptsas_scsi_realize(PCIDevice *dev, Error **errp)
s->request_bh = qemu_bh_new(mptsas_fetch_requests, s);
QTAILQ_INIT(&s->pending);
scsi_bus_new(&s->bus, sizeof(s->bus), &dev->qdev, &mptsas_scsi_info, NULL);
}

1
hw/scsi/mptsas.h
View File

@ -79,7 +79,6 @@ struct MPTSASState {
uint16_t reply_frame_size;
SCSIBus bus;
QTAILQ_HEAD(, MPTSASRequest) pending;
};
void mptsas_fix_scsi_io_endianness(MPIMsgSCSIIORequest *req);

6
include/qemu/compiler.h
View File

@ -11,6 +11,12 @@
#define QEMU_STATIC_ANALYSIS 1
#endif
#ifdef __cplusplus
#define QEMU_EXTERN_C extern "C"
#else
#define QEMU_EXTERN_C extern
#endif
#define QEMU_NORETURN __attribute__ ((__noreturn__))
#define QEMU_WARN_UNUSED_RESULT __attribute__((warn_unused_result))

38
include/qemu/osdep.h
View File

@ -57,7 +57,7 @@
#define daemon qemu_fake_daemon_function
#include <stdlib.h>
#undef daemon
extern int daemon(int, int);
QEMU_EXTERN_C int daemon(int, int);
#endif
#ifdef _WIN32
@ -104,6 +104,15 @@ extern int daemon(int, int);
#include <setjmp.h>
#include <signal.h>
#ifdef CONFIG_IOVEC
#include <sys/uio.h>
#endif
#if defined(__linux__) && defined(__sparc__)
/* The SPARC definition of QEMU_VMALLOC_ALIGN needs SHMLBA */
#include <sys/shm.h>
#endif
#ifndef _WIN32
#include <sys/wait.h>
#else
@ -111,6 +120,21 @@ extern int daemon(int, int);
#define WEXITSTATUS(x) (x)
#endif
#ifdef __APPLE__
#include <AvailabilityMacros.h>
#endif
/*
* This is somewhat like a system header; it must be outside any extern "C"
* block because it includes system headers itself, including glib.h,
* which will not compile if inside an extern "C" block.
*/
#include "glib-compat.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef _WIN32
#include "sysemu/os-win32.h"
#endif
@ -119,11 +143,6 @@ extern int daemon(int, int);
#include "sysemu/os-posix.h"
#endif
#ifdef __APPLE__
#include <AvailabilityMacros.h>
#endif
#include "glib-compat.h"
#include "qemu/typedefs.h"
/*
@ -459,7 +478,6 @@ void qemu_anon_ram_free(void *ptr, size_t size);
/* Use 1 MiB (segment size) alignment so gmap can be used by KVM. */
# define QEMU_VMALLOC_ALIGN (256 * 4096)
#elif defined(__linux__) && defined(__sparc__)
#include <sys/shm.h>
# define QEMU_VMALLOC_ALIGN MAX(qemu_real_host_page_size, SHMLBA)
#else
# define QEMU_VMALLOC_ALIGN qemu_real_host_page_size
@ -539,8 +557,6 @@ struct iovec {
ssize_t readv(int fd, const struct iovec *iov, int iov_cnt);
ssize_t writev(int fd, const struct iovec *iov, int iov_cnt);
#else
#include <sys/uio.h>
#endif
#ifdef _WIN32
@ -722,4 +738,8 @@ static inline int platform_does_not_support_system(const char *command)
}
#endif /* !HAVE_SYSTEM_FUNCTION */
#ifdef __cplusplus
}
#endif
#endif

9
qapi/migration.json
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@ -224,9 +224,14 @@
# only returned if VFIO device is present, migration is supported by all
# VFIO devices and status is 'active' or 'completed' (since 5.2)
#
# @blocked-reasons: A list of reasons an outgoing migration is blocked.
# Present and non-empty when migration is blocked.
# (since 6.0)
#
# @blocked: True if outgoing migration is blocked (since 6.0)
#
# @blocked-reasons: A list of reasons an outgoing migration is blocked (since 6.0)
# Features:
# @deprecated: Member @blocked is deprecated. Use @blocked-reasons instead.
#
# Since: 0.14
##
@ -241,7 +246,7 @@
'*setup-time': 'int',
'*cpu-throttle-percentage': 'int',
'*error-desc': 'str',
'blocked': 'bool',
'blocked': { 'type': 'bool', 'features': [ 'deprecated' ] },
'*blocked-reasons': ['str'],
'*postcopy-blocktime' : 'uint32',
'*postcopy-vcpu-blocktime': ['uint32'],

1
qga/commands-posix.c
View File

@ -1376,6 +1376,7 @@ static GuestDiskInfoList *get_disk_partitions(
partition = g_new0(GuestDiskInfo, 1);
partition->name = dev_name;
partition->partition = true;
partition->has_dependencies = true;
/* Add parent disk as dependent for easier tracking of hierarchy */
QAPI_LIST_PREPEND(partition->dependencies, g_strdup(disk_dev));

5
target/arm/translate.c
View File

@ -9199,11 +9199,6 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
if (tb_cflags(dc->base.tb) & CF_LAST_IO && dc->condjmp) {
/* FIXME: This can theoretically happen with self-modifying code. */
cpu_abort(cpu, "IO on conditional branch instruction");
}
/* At this stage dc->condjmp will only be set when the skipped
instruction was a conditional branch or trap, and the PC has
already been written. */

9
target/mips/rel6_translate.c
View File

@ -1,12 +1,11 @@
/*
* MIPS emulation for QEMU - # Release 6 translation routines
* MIPS emulation for QEMU - Release 6 translation routines
*
* Copyright (c) 2004-2005 Jocelyn Mayer
* Copyright (c) 2006 Marius Groeger (FPU operations)
* Copyright (c) 2006 Thiemo Seufer (MIPS32R2 support)
* Copyright (c) 2020 Philippe Mathieu-Daudé
*
* This code is licensed under the GNU GPLv2 and later.
* SPDX-License-Identifier: LGPL-2.1-or-later
*
* This code is licensed under the LGPL v2.1 or later.
*/
#include "qemu/osdep.h"